Мне остался по наследству модуль
module alg_integrator_smart (clk, reset, start, base, data_in, data_slow, ready_const, clk_const, addr_const, data_const, tdpp, data_out, int_out, int_diff, tau_out);
input clk, reset, start;
input signed [15:0] data_in;
input signed [47:0] data_slow;
input signed [23:0] base;
input ready_const, clk_const;
input [5:0] addr_const;
input [15:0] data_const;
input signed [15:0] tdpp;
output signed [47:0] data_out;
output signed [15:0] int_out;
output signed [15:0] int_diff;
output signed [23:0] tau_out;
reg signed [23:0] r_base = 24'sd51200;
reg signed [47:0] resalt_r, sample_data;
reg signed [63:0] resalt, resalt_i;
reg [1:0] front_start;
reg signed [23:0] tau_coeff = 24'sd117500;// 917.97 *128
reg signed [23:0] tau_calc = 24'sd117500;// 917.97 *128
reg signed [16:0] k1 = 17'sd0;
reg signed [16:0] k2 = 17'sd0;
reg tau_calc_en = 1'b0;// default
reg signed [39:0] tau_acc;
reg signed [16:0] tdpp_delta;
//*******************************************************
reg signed [23:0] fifo_amp [2:0];
reg signed [47:0] buf2;
reg start_prev = 1'b0;
reg signed [63:0] int_prev;
reg signed [63:0] delta;
//*******************************************************
// process for update constants
always @(posedge clk_const)
begin
if (ready_const)
case (addr_const)
6'd2: tau_coeff[15:0] <= data_const;
6'd3: tau_coeff[23:16] <= data_const[7:0];
6'd23: tau_calc_en <= data_const[3];// customize[3] -> + 8
6'd25: begin k2[15:0] <= data_const; k2[16] <= 1'b0; end// coefficient (top_discriminator)
6'd26: begin k1[15:0] <= data_const; k1[16] <= 1'b0; end// base temperature (bottom_discriminator)
default:
begin
tau_coeff <= tau_coeff;
tau_calc_en <= tau_calc_en;
k2 <= k2;
k1 <= k1;
end
endcase
end
// process tau calculation
always@(negedge clk)
begin
tdpp_delta <= tdpp - k1;
if (tau_calc_en == 1'b1)
begin
if (k1 > 0)
// tau_calc <= tau_acc >>> 16;
tau_calc <= tau_acc >>> 15;
else
tau_calc <= tau_coeff;
end
else
tau_calc <= tau_coeff;
end
always@(posedge clk)
begin
// tau_acc <= (tau_coeff <<< 16) + k2 * tdpp_delta;
tau_acc <= (tau_coeff <<< 15) + k2 * tdpp_delta;
end
// main process of integrator
always@(posedge clk or negedge reset)
begin
if(reset == 1'b0)
begin : resetting
resalt <= 64'sd0;
resalt_i <= 64'sd0;
//resalt_r <= 48'sd0;
buf2 <= 48'sd0;
end
else
begin : calculating
// input signal buffer
fifo_amp[0] <= (data_in <<< 8) - r_base;
fifo_amp[1] <= fifo_amp[0];
fifo_amp[2] <= fifo_amp[1];
// buf2 <= fifo_amp[0] * tau_coeff;
buf2 <= fifo_amp[0] * tau_calc;
if ((start_prev == 1'b1) & (start == 1'b0))
resalt_i <= resalt_i + buf2 - sample_data;
else
resalt_i <= resalt_i + buf2;
resalt <= resalt_i + (fifo_amp[2] <<< 22);
end
end
always@(posedge clk or negedge reset)
if(reset == 1'b0)
r_base <= r_base;
else
if ((start_prev == 1'b1) & (start == 1'b0))
r_base <= base;
else
r_base <= r_base;
// process for update slow data
always@(posedge clk or negedge reset)
if (reset == 1'b0)
sample_data <= 48'd0;
else
sample_data <= data_slow;
// process for generate start vector
always@(posedge clk)
begin
//front_start[0] <= start;
//front_start[1] <= front_start[0];
start_prev <= start;
end
// process for calculate delta INT
always@(posedge clk)
begin
delta <= resalt - int_prev;
int_prev <= resalt;
end
// connect outputs
assign data_out = resalt;
assign int_out = resalt_i >>> 30;
assign int_diff = delta >>> 30;
assign tau_out = tau_calc;
endmodule
естественно разработчика я не застал, мои попытки увеличить тактовую хотя бы на 30-40 МГц не принесли результатов
проблема в арифметике:
buf2 <= fifo_amp[0] * tau_calc;
if ((start_prev == 1'b1) & (start == 1'b0))
resalt_i <= resalt_i + buf2 - sample_data;
else
resalt_i <= resalt_i + buf2;
resalt <= resalt_i + (fifo_amp[2] <<< 22);
Квартус 18.1 для циклон5 дает 102MHz ...
Да описание написано лет десять назад... работало на циклон3
я смог добиться 114МГц
module alg_integrator_smart (clk, tau_coeff,k1,k2,tau_calc_en, reset, start, base, data_in, data_slow, ready_const, addr_const, data_const, tdpp, data_out, int_out, int_diff, tau_out);
input clk, reset, start;
input signed [15:0] data_in;
input signed [47:0] data_slow;
input signed [23:0] base;
input ready_const;
input [5:0] addr_const;
input [15:0] data_const;
input signed [23:0] tau_coeff; // = 24'sd117500;// 917.97 *128
input signed [16:0] k1; // = 17'sd0;
input signed [16:0] k2; // = 17'sd0;
input tau_calc_en; // = 1'b0;// default
input signed [15:0] tdpp;
output signed [47:0] data_out;
output signed [15:0] int_out;
output signed [15:0] int_diff;
output signed [23:0] tau_out;
reg signed [47:0] reg_data_slow;
reg signed [23:0] r_base = 24'sd51200;
reg signed [47:0] resalt_r, sample_data;
reg signed [63:0] resalt, resalt_i;
reg signed [63:0] resalt_a, resalt_b;
reg signed [47:0] resalt0;
reg [1:0] front_start;
//reg signed [23:0] tau_coeff = 24'sd117500;// 917.97 *128
reg signed [23:0] tau_calc = 24'sd117500;// 917.97 *128
//reg signed [16:0] k1 = 17'sd0;
//reg signed [16:0] k2 = 17'sd0;
//reg tau_calc_en = 1'b0;// default
reg signed [39:0] tau_acc;
reg signed [31:0] tau_acc0;
reg signed [31:0] tau_acc1;
reg signed [16:0] tdpp_delta;
//*******************************************************
reg signed [23:0] fifo_amp [2:0];
reg signed [47:0] buf2;
reg start_prev = 1'b0;
reg signed [63:0] int_prev;
reg signed [63:0] delta;
//*******************************************************
// process for update constants
//always @(posedge clk) //clk_const
//begin
// if (ready_const)
// case (addr_const)
// 6'd2: tau_coeff[15:0] <= data_const;
// 6'd3: tau_coeff[23:16] <= data_const[7:0];
// 6'd23: tau_calc_en <= data_const[3];// customize[3] -> + 8
// 6'd25: begin k2[15:0] <= data_const; k2[16] <= 1'b0; end// coefficient (top_discriminator)
// 6'd26: begin k1[15:0] <= data_const; k1[16] <= 1'b0; end// base temperature (bottom_discriminator)
// default:
// begin
// tau_coeff <= tau_coeff;
// tau_calc_en <= tau_calc_en;
// k2 <= k2;
// k1 <= k1;
// end
// endcase
//end
// process tau calculation
always@(negedge clk)
begin
tdpp_delta <= tdpp - k1;
if (tau_calc_en == 1'b1)
begin
if (k1 > 0)
// tau_calc <= tau_acc >>> 16;
tau_calc <= tau_acc >>> 15;
else
tau_calc <= tau_coeff;
end
else
tau_calc <= tau_coeff;
end
always@(posedge clk)
begin
// tau_acc <= (tau_coeff <<< 16) + k2 * tdpp_delta;
//tau_acc <= (tau_coeff <<< 15) + k2 * tdpp_delta;
tau_acc <= tau_acc0 + tau_acc1;
end
always @( posedge clk)
begin
tau_acc0 <= tau_coeff <<< 15;
end
always @( posedge clk)
begin
tau_acc1 <= k2 * tdpp_delta;
end
// main process of integrator
always@(posedge clk or negedge reset)
begin
if(reset == 1'b0)
begin : resetting
resalt <= 64'sd0;
resalt_i <= 64'sd0;
//resalt_r <= 48'sd0;
//buf2 <= 48'sd0;
end
else
begin : calculating
// input signal buffer
fifo_amp[0] <= (data_in <<< 8) - r_base;
fifo_amp[1] <= fifo_amp[0];
fifo_amp[2] <= fifo_amp[1];
// buf2 <= fifo_amp[0] * tau_coeff;
if ((start_prev == 1'b1) & (start == 1'b0))
//resalt_i <= resalt_i + buf2 - sample_data;
resalt_i <= resalt_a;
else
resalt_i <= resalt_b;
resalt <= resalt_i + (fifo_amp[2] <<< 22);
end
end
always @( posedge clk)
begin
resalt_a <= resalt_a + resalt0; //sample_data;
end
always @( posedge clk)
begin
resalt_b <= resalt_b + buf2; //sample_data;
end
always @( posedge clk)
begin
//reg_data_slow <= data_slow;
resalt0 <= buf2 - data_slow; //sample_data;
end
always @( posedge clk)
begin
buf2 = fifo_amp[0] * tau_calc;
end
always@(posedge clk or negedge reset)
if(reset == 1'b0)
r_base <= r_base;
else
if ((start_prev == 1'b1) & (start == 1'b0))
r_base <= base;
else
r_base <= r_base;
//// process for update slow data
//always@(posedge clk or negedge reset)
// if (reset == 1'b0)
// sample_data <= 48'd0;
// else
// sample_data <= data_slow;
// process for generate start vector
always@(posedge clk)
begin
//front_start[0] <= start;
//front_start[1] <= front_start[0];
start_prev <= start;
end
// process for calculate delta INT
always@(posedge clk)
begin
delta <= resalt - int_prev;
int_prev <= resalt;
end
// connect outputs
assign data_out = resalt;
assign int_out = resalt_i >>> 30;
assign int_diff = delta >>> 30;
assign tau_out = tau_calc;
endmodule
и то я изменил немного матемтику она не соответствует первоначальной (это видно в моем описании выше):
if ((start_prev == 1'b1) & (start == 1'b0))
resalt_i <= resalt_i + buf2 - sample_data;
else
resalt_i <= resalt_i + buf2;
я сделал вычисления в условиях независимыми, что есть не совсем правильным
этот always я уберу - эти регистры будут инициализироваться по авлон ММ шине в одном модуле - в этот модуль будут приходить как входные данные (в моем варианте этот процесс уже закоментирован):
// process for update constants
always @(posedge clk_const)
begin
if (ready_const)
case (addr_const)
6'd2: tau_coeff[15:0] <= data_const;
6'd3: tau_coeff[23:16] <= data_const[7:0];
6'd23: tau_calc_en <= data_const[3];// customize[3] -> + 8
6'd25: begin k2[15:0] <= data_const; k2[16] <= 1'b0; end// coefficient (top_discriminator)
6'd26: begin k1[15:0] <= data_const; k1[16] <= 1'b0; end// base temperature (bottom_discriminator)
default:
begin
tau_coeff <= tau_coeff;
tau_calc_en <= tau_calc_en;
k2 <= k2;
k1 <= k1;
end
endcase
end
Буду рад конструктивным предложениям/мыслям по увеличению тактовой частоты хотя бы до 130-140МГц ...
