[sergey23 0]

Hello,The circuit is supposed to delay the output of P12 because the PNP is opening gradually.
In previos version it worked great but i put P12 as a pulse and circuit just not working.

The Veb is totally different.Veb is supposed to be 0 and rise gradually.

But when i made P12 0-12V pulse my Veb is tottaly ruined.

How can i fix it so Veb will rise gradually from 0 till PNP is opening?

LTSPICE file is attached.

Thanks.

test4.zip

[sergey23 0]

UPDATE:

Hello,There was a basic flaw in my simulation because Vb started from 12V and went down.
In here our Vb start to zero So Veb is 12V and going down Thus its always open.
Is there a way to fix it?
Thanks.

[1113 7]

rotate C4 in parallel to R10

connect it to P12 not to gnd

[sergey23 0]

Hello ,Yes it works .
for me plugging the capacitor was a method to delay the charging of the base.

What is the difference between the capacitor to GND and the advice you made?

whats happening in the PNP when we connect the capacitor in the manner you suggested?

Thanks.

_originak.zip

Изменено 16 сентября пользователем sergey23

[1113 7]

C4 works same but difference in initial value for q1

[sergey23 0]

Hello,Q1 is PNP , What happens when we connect  a capacitor between base and  emmiter and pulse of 0-12V is coming?

At first before the pulse the base is 0V,What the capacitor is doing to the base when the emitter suddenly changes to 12V?
Thanks.

Изменено 16 сентября пользователем sergey23

[1113 7]

when C4 connect to gnd, initial value will ON
when C4 connect to P12, initial value will OFF

[Точка Опоры 38]

You're simply burn Q1 emitter junction by C4 from base to ground. Either when power up (due unlimited forward base current), or when powerdown (due to reverce breakdown from charged capacitor).

BTW, why you dust one design over many topics? А может быть и по русски можете писать, не выделываясь?

Изменено 16 сентября пользователем Точка Опоры

[sergey23 0]

Hello, When i will build it in my lab and i will turn on the power supply.

capacitor has the tendency to be continues with voltage , so id there is a voltage jump on one side it will transform to the other side .

So the quetion is about the capacitor.

When we send a pulse on P12 How C4 will behave?
Why the Gnd on the other side ruins it?
Thanks.

[Plain 220]

В 16.09.2024 в 16:52, Точка Опоры сказал:

может быть и по русски можете писать

В первой теме было, и практически готовый секвенсер в одной из его тем я уже дал, но как я и предполагал, он там остался для всех прочих желающих, кроме автора, т.е. это не учёба и не работа, а именно обрывки ответов на чьи-то где-то поисковые запросы.

[sergey23 0]

Hello, plain, sorry for the missunderstanding 1113 made my sequencer working when both pulses are at the same time.
I am just trying to understand why the capacitor behaved as he behaved.

Thanks.

В первой теме было, и практически готовый секвенсер в одной из его тем я уже дал, но как я и предполагал, он там остался для всех прочих желающих, кроме автора, т.е. это не учёба и не работа, а именно обрывки ответов на чьи-то где-то поисковые запросы.

[sergey23 0]

Hello , What about the situation when i move C4 to be parralel to R10.
There is a basic law regarding capacitors shown below.
"The principle of continuity of capacitive voltage says: In the absence of infinite current, the voltage across a capacitor cannot change instantaneously."

looking at the following situation how does the capacitor acts?
one leg feel rise of zero to 12V what does the other leg get because of that and why?