Mad_kvmg 0 2 декабря, 2013 Опубликовано 2 декабря, 2013 · Жалоба US microelectronics company working on a state-of-art high speed data processing system is looking for a rockstar RTL and Verification engineers, capable to propel our advanced technology and solve complex tasks in a high paced competitive environment. What we offer - 3 Months full time/part time engagement in a research project with a possibility for a full time job - $2000-$3000/month - Remote work - Part time job is possible - Challenging tasks within an international design stars team RTL engineer requirements: - Bachelor/Master/PhD degree in Microelectronics or related fields - 5+ years of related experience in ASIC or FPGA RTL projects (10+ years for a Senior position) - Excellence in Verilog RTL is a must - Prior experience in complex System-on-chip design - Multi clock domain and CDC design experience - Experience with the highly pipelined design, knowledge of processor architectures is an advantage - Hands-on experience with high speed interfaces (10G/40G, PCI Express) is desired Verification engineer requirements: - Bachelor/Master/PhD degree in Microelectronics or related fields - 5+ years of related experience in ASIC or FPGA Verification (10+ years for a Senior position) - Proven hands-on experience in TLM and advanced verification methodologies - Proven experience in a system-on-chip IP integration - Linux Make/Bash/Python scripting experience Please send your CV and 2 references to: [email protected] We're an equal opportunity employer and dedicated to diversity. Applications from any region in Russia and CIS are highly welcomed! Цитата Поделиться сообщением Ссылка на сообщение Поделиться на другие сайты Поделиться
Mad_kvmg 0 7 декабря, 2013 Опубликовано 7 декабря, 2013 · Жалоба Please indicate the position you are applying to Цитата Поделиться сообщением Ссылка на сообщение Поделиться на другие сайты Поделиться
Raven 8 7 декабря, 2013 Опубликовано 7 декабря, 2013 · Жалоба It's not clear - is the company Zelenograd or Moscow region based? Or somewhere else? Цитата Поделиться сообщением Ссылка на сообщение Поделиться на другие сайты Поделиться
agate 0 7 декабря, 2013 Опубликовано 7 декабря, 2013 · Жалоба Strange, but if this is verification position than you would need give clue about Verification methodology/flow/tools used. Цитата Поделиться сообщением Ссылка на сообщение Поделиться на другие сайты Поделиться