[sergei94 0]

Hello ,In the diagram shown bellow we have 1.5 bit ADC stage.
We have Vin which is analog signal and it could be translated as 00 01 or 10

in one bitwe have only the option of 0 or 1 
I cant see howit fixed an error,its just dividing therange to more logical sections.i cant see any error fixing in here.
is there simple practical example i could use to visualise how it happens?

Thanks.