взято из IDE\ipcore\MIPI_RX_Advance\data\DPHY_RX_TOP.v
========== Gowin_V1.9.8.11
module `module_name_rx(
input reset_n , //Resets the Design
`ifdef MIPI_COMB_CLK
input MIPI_COMB_CLK_P , //HS (High Speed) Clock
input MIPI_COMB_CLK_N , //HS (High Speed) Clock
output [1:0] lp_clk_out , //LP (Low Power) Data Receiving Signals for Clock Lane
`elsif MIPI_CLK
..... и тд
========== Gowin_V1.9.9.01
module `module_name_rx(
input reset_n , //Resets the Design
`ifdef MIPI_COMB_CLK
inout MIPI_COMB_CLK_P , //HS (High Speed) Clock
inout MIPI_COMB_CLK_N , //HS (High Speed) Clock
output [1:0] lp_clk_out , //LP (Low Power) Data Receiving Signals for Clock Lane
`elsif MIPI_CLK
..... и тд
что в шаблоне записано то и генерировалось
они изменили шаблон (когда то)
