gosha 0 30 декабря, 2010 Опубликовано 30 декабря, 2010 · Жалоба Virtex4, Ise 10.1, Xilinx Core generator. На стадии map implementation проекта xilinx eth с rgmii выдаются ошибки: Ни как не могу понять причину, какие ограничения и для каких компонентов надо задать? Какие доп данные/ фрагменты кода/log нужно/можно привести? Пропадаю. Спасибо. Phase 4.2 ... ERROR:Place:872 - Delay element "eth23/eth23/v4_emac_block/rgmii_rxd_rising_0_i(0)" has been placed at ILOGIC_X0Y155 due to the following location constraint on component "RGMII_RXD_0(0)": COMP "RGMII_RXD_0(0)" LOCATE = SITE "N21" LEVEL 1 However, the delay controller that calibrates this delay element has not been used. Please instantiate a delay controller and apply appropriate location constraint, or instantiate one delay controller for the design with out any location constraint. Please refer to the usage document to use the controller efficiently. ERROR:Place:872 - Delay element "eth23/eth23/v4_emac_block/rgmii_rxd_rising_0_i(1)" has been placed at ILOGIC_X0Y154 due to the following location constraint on component "RGMII_RXD_0(1)": COMP "RGMII_RXD_0(1)" LOCATE = SITE "M21" LEVEL 1 However, the delay controller that calibrates this delay element has not been used. Please instantiate a delay controller and apply appropriate location constraint, or instantiate one delay controller for the design with out any location constraint. Please refer to the usage document to use the controller efficiently. ERROR:Place:872 - Delay element "eth23/eth23/v4_emac_block/rgmii_rxd_rising_0_i(2)" has been placed at ILOGIC_X0Y153 due to the following location constraint on component "RGMII_RXD_0(2)": COMP "RGMII_RXD_0(2)" LOCATE = SITE "N18" LEVEL 1 However, the delay controller that calibrates this delay element has not been used. Please instantiate a delay controller and apply appropriate location constraint, or instantiate one delay controller for the design with out any location constraint. Please refer to the usage document to use the controller efficiently. ERROR:Place:872 - Delay element "eth23/eth23/v4_emac_block/rgmii_rxd_rising_0_i(3)" has been placed at ILOGIC_X0Y152 due to the following location constraint on component "RGMII_RXD_0(3)": COMP "RGMII_RXD_0(3)" LOCATE = SITE "N17" LEVEL 1 However, the delay controller that calibrates this delay element has not been used. Please instantiate a delay controller and apply appropriate location constraint, or instantiate one delay controller for the design with out any location constraint. Please refer to the usage document to use the controller efficiently. ERROR:Place:850 - Delay element "eth23/eth23/v4_emac_block/rgmii_rxd_rising_1_i(0)" has been placed at ILOGIC_X1Y103, however, the delay controller that calibrates this element has not been used. If a delay controller has been instantiated and a location constraint has been applied to it, please constraint this delay element to the same region. If a delay controller has not been instantiated please instantiate one. Please refer to the usage document to use the delay controller efficiently. ERROR:Place:850 - Delay element "eth23/eth23/v4_emac_block/rgmii_rxd_rising_1_i(1)" has been placed at ILOGIC_X1Y102, however, the delay controller that calibrates this element has not been used. If a delay controller has been instantiated and a location constraint has been applied to it, please constraint this delay element to the same region. If a delay controller has not been instantiated please instantiate one. Please refer to the usage document to use the delay controller efficiently. ERROR:Place:850 - Delay element "eth23/eth23/v4_emac_block/rgmii_rxd_rising_1_i(2)" has been placed at ILOGIC_X1Y111, however, the delay controller that calibrates this element has not been used. If a delay controller has been instantiated and a location constraint has been applied to it, please constraint this delay element to the same region. If a delay controller has not been instantiated please instantiate one. Please refer to the usage document to use the delay controller efficiently. ERROR:Place:850 - Delay element "eth23/eth23/v4_emac_block/rgmii_rxd_rising_1_i(3)" has been placed at ILOGIC_X1Y109, however, the delay controller that calibrates this element has not been used. If a delay controller has been instantiated and a location constraint has been applied to it, please constraint this delay element to the same region. If a delay controller has not been instantiated please instantiate one. Please refer to the usage document to use the delay controller efficiently. ERROR:Place:872 - Delay element "eth23/eth23/v4_emac_block/rgmii_rx_ctl_rising_0_i" has been placed at ILOGIC_X0Y148 due to the following location constraint on component "RGMII_RX_CTL_0": COMP "RGMII_RX_CTL_0" LOCATE = SITE "R16" LEVEL 1 However, the delay controller that calibrates this delay element has not been used. Please instantiate a delay controller and apply appropriate location constraint, or instantiate one delay controller for the design with out any location constraint. Please refer to the usage document to use the controller efficiently. ERROR:Place:850 - Delay element "eth23/eth23/v4_emac_block/rgmii_rx_ctl_rising_1_i" has been placed at ILOGIC_X1Y97, however, the delay controller that calibrates this element has not been used. If a delay controller has been instantiated and a location constraint has been applied to it, please constraint this delay element to the same region. If a delay controller has not been instantiated please instantiate one. Please refer to the usage document to use the delay controller efficiently. WARNING:Place:851 - The delay controller "eth23/eth23/v4_emac_block/dlyctrl_0" has been locked with the following location constraint: COMP "eth23/eth23/v4_emac_block/dlyctrl_0" LOCATE = SITE "IDELAYCTRL_X0Y6" LEVEL 1 However, none of the delay elements calibrated by this controller are being used. The controller will still use up a global clock resource from the clock region and consume power. Please refer to the usage document to use the controller efficiently. WARNING:Place:851 - The delay controller "eth23/eth23/v4_emac_block/dlyctrl_1" has been locked with the following location constraint: COMP "eth23/eth23/v4_emac_block/dlyctrl_1" LOCATE = SITE "IDELAYCTRL_X0Y1" LEVEL 1 However, none of the delay elements calibrated by this controller are being used. The controller will still use up a global clock resource from the clock region and consume power. Please refer to the usage document to use the controller efficiently. WARNING:Place:851 - The delay controller "eth23/eth23/v4_emac_block/dlyctrl_clk_0" has been locked with the following location constraint: COMP "eth23/eth23/v4_emac_block/dlyctrl_clk_0" LOCATE = SITE "IDELAYCTRL_X1Y5" LEVEL 1 However, none of the delay elements calibrated by this controller are being used. The controller will still use up a global clock resource from the clock region and consume power. Please refer to the usage document to use the controller efficiently. WARNING:Place:851 - The delay controller "eth23/eth23/v4_emac_block/dlyctrl_clk_1" has been locked with the following location constraint: COMP "eth23/eth23/v4_emac_block/dlyctrl_clk_1" LOCATE = SITE "IDELAYCTRL_X1Y2" LEVEL 1 However, none of the delay elements calibrated by this controller are being used. The controller will still use up a global clock resource from the clock region and consume power. Please refer to the usage document to use the controller efficiently. #.ucf CONFIG PART = 4vfx60ff672-10; NET "CLK_I" TNM_NET = "CLK_I"; TIMESPEC TS_CLK_I = PERIOD "CLK_I" 125 MHz HIGH 50%; NET "PCI_CLK" TNM_NET = "PCI_CLK"; TIMESPEC TS_PCI_CLK = PERIOD "PCI_CLK" 35 MHz HIGH 50%; INST "*v4_emac" LOC = "EMAC_X0Y0"; # IDELAYCTRL location - must be same clock region as receiver IOs INST "*dlyctrl_0" LOC = "IDELAYCTRL_X0Y6"; INST "*dlyctrl_clk_0" LOC = "IDELAYCTRL_X1Y5"; # IDELAYCTRL location - must be same clock region as receiver IOs INST "*dlyctrl_1" LOC = "IDELAYCTRL_X0Y1"; INST "*dlyctrl_clk_1" LOC = "IDELAYCTRL_X1Y2" example_design.zip Цитата Поделиться сообщением Ссылка на сообщение Поделиться на другие сайты Поделиться
