не отправляются пакеты по Ethernet.
Написан пример, который должен каждую секунду отправлять один и тот же широковещательный пакет UDP.
модуль SP_601_BRD_CLOCKS был подключе из примера который идет с китом.
модуль ETH_MDIO был подключен из примера который идет с китом и верно возвращает значение LINK_SPEED.
В UCF файле PHY интерфейс скопирован из файла UCF примера.
текст модуля пересылки пакета:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
library unisim;
use unisim.vcomponents.all;
entity TX_ETH is
Port ( clk125 : in STD_LOGIC; --CLK125_RX
TX: out STD_LOGIC_VECTOR (7 downto 0);--PHY_TXT<7..0>
tx_en : out STD_LOGIC; --PHY_TXEN
GTXC: out STD_LOGIC);--PHY_TXC_GTXCLK
end TX_ETH;
architecture Behavioral of TX_ETH is
signal q: std_logic_vector(7 downto 0);
signal i: std_logic_vector(7 downto 0);
begin
process(clk125)
variable j: integer range 0 to 200000000 := 0;
begin
if (clk125 = '1' and clk125'event) then
if (i = x"01") then
tx_en <= '1';
end if;
case(i) is
-- Pilot and start_bit (8 bytes)
when x"00" => q <= x"00";
when x"01" => q <= x"55";
when x"02" => q <= x"55";
when x"03" => q <= x"55";
when x"04" => q <= x"55";
when x"05" => q <= x"55";
when x"06" => q <= x"55";
when x"07" => q <= x"55";
when x"08" => q <= x"d5";
-- Ethernet header
when x"09" => q <= x"ff";-- Ethernet Destination Address (if ff:ff:ff:ff:ff:ff - broadcast)
when x"0a" => q <= x"ff";
when x"0b" => q <= x"ff";
when x"0c" => q <= x"ff";
when x"0d" => q <= x"ff";
when x"0e" => q <= x"ff";
when x"0f" => q <= x"00";-- Ethernet Source Address
when x"10" => q <= x"0A";
when x"11" => q <= x"35";
when x"12" => q <= x"02";
when x"13" => q <= x"00";
when x"14" => q <= x"D9";
when x"15" => q <= x"08";-- Type (if 08:00 - IP)
when x"16" => q <= x"00";
-- IP header
when x"17" => q <= x"45";
when x"18" => q <= x"00";
when x"19" => q <= x"00";
when x"1a" => q <= x"2E";
when x"1b" => q <= x"00";
when x"1c" => q <= x"00";
when x"1d" => q <= x"40";
when x"1e" => q <= x"00";
when x"1f" => q <= x"40";
when x"20" => q <= x"11";
when x"21" => q <= x"3A";
when x"22" => q <= x"C0";
when x"23" => q <= x"00";
when x"24" => q <= x"00";
when x"25" => q <= x"00";
when x"26" => q <= x"00";
when x"27" => q <= x"ff";
when x"28" => q <= x"ff";
when x"29" => q <= x"ff";
when x"2a" => q <= x"ff";
-- UDP header
when x"2b" => q <= x"00";
when x"2c" => q <= x"00";
when x"2d" => q <= x"00";
when x"2e" => q <= x"00";
when x"2f" => q <= x"00";
when x"30" => q <= x"1A";
when x"31" => q <= x"ff";--Checksum
when x"32" => q <= x"B6";--
-- UDP data
when x"33" => q <= x"00";
when x"34" => q <= x"00";
when x"35" => q <= x"00";
when x"36" => q <= x"04";
when x"37" => q <= x"00";
when x"38" => q <= x"00";
when x"39" => q <= x"00";
when x"3a" => q <= x"00";
when x"3b" => q <= x"00";
when x"3c" => q <= x"00";
when x"3d" => q <= x"00";
when x"3e" => q <= x"00";
when x"3f" => q <= x"00";
when x"40" => q <= x"00";
when x"41" => q <= x"00";
when x"42" => q <= x"00";
when x"43" => q <= x"00";
when x"44" => q <= x"00";
----FCS
when x"45" => q <= x"C0";
when x"46" => q <= x"C1";
when x"47" => q <= x"7F";
when x"48" => q <= x"0C";
when others => q <= "00000000";
end case;
tx(0) <= q(0);
tx(1) <= q(1);
tx(2) <= q(2);
tx(3) <= q(3);
tx(4) <= q(4);
tx(5) <= q(5);
tx(6) <= q(6);
tx(7) <= q(7);
i <= i + 1;
j := j + 1;
if (i >= x"50") then
tx_en <= '0';
i <= x"55";
end if;
if (j = 125000000) then
i <= x"01";
j := 0;
end if;
end if;
end process;
ODDR2_0 : ODDR2
generic map (
DDR_ALIGNMENT => "NONE", -- Sets output alignment to "NONE", "C0" or "C1"
INIT => '0', -- Sets initial state of the Q output to 1'b0 or 1'b1
SRTYPE =>"SYNC" -- Specifies "SYNC" or "ASYNC" set/reset
) port map(
Q => GTXC, -- 1-bit DDR output data
C0 =>CLK125, -- 1-bit clock input
C1 => not(CLK125), -- 1-bit clock input
CE => '1', -- 1-bit clock enable input
D0 => '1', -- 1-bit data input (associated with C0)
D1 => '0', -- 1-bit data input (associated with C1)
R => '0', -- 1-bit reset input
S => '0' -- 1-bit set input
);
end Behavioral;
в чем моя ошибка?