grujic

ADS Momentum is very good for planar structures In newer versions, it is also very easy to switch to 3D FEM if needed, e.g. for bondwire simulation. Everything is integrated with circuit solver, so you have a complete design environment.

I'm getting an "out of memory" error from HFSS on 64 bit Linux when the problem size approaches 3 GB. There is more than enough physical memory, so I've concluded that it must be running 32 bit executables. How to solve this?

Murata supplies a design kit for Agilent ADS with measured component models: http://www.murata.com/products/design_supp...lent/index.html

Maybe this is redundant, but there is a pre-built Kicad (latest version) for Ubuntu at http://iut-tice.ujf-grenoble.fr/cao/ Just decompress and put into path.

If I understood the question correctly, your task is to design a PCB for digital ASIC, and you're concerned with power and signal integrity. If this is the question, then the answer would be: The chip designer should ensure that the chip will operate correctly with the assigned power (supply and ground) pins, including the packaging effects (bondwire, leadframe etc.). PCB power integrity analysis should ensure that the power can be delivered to the ASIC. This usually means that the decoupling is designed correctly, and that the power distribution traces don't resonate at the frequencies of interest, i.e. clock. Xilinx has a good application notes about PCB design for power integrity and decoupling: http://www.xilinx.com/products/design_reso...ce/si_power.htm The best thing to do would be to simulate the PCB design with some EM software (for example ADS Momentum) and then use the chip equivalent model to verify correctness. IBIS models can be used for signal integrity, I'm not sure that they can be used for power integrity simulations. Two good books on the topic: http://www.amazon.com/High-Speed-Digital-D...6069&sr=1-1 http://www.amazon.com/High-Speed-Signal-Pr...6069&sr=1-4 I hope this helps.

Thank you very much for the explanation. I will have these things in mind for port definitions.

Maybe you could try to limit the values inside VerilogA models, with an if statement.

Could you please be more specific about port definitions for non-microstrip lines? The other question is how to treat coupled (differential) microstrip lines. Will the single ports give the accurate result, or should the even and odd mode be simulated separately with differential and common mode ports?

I know that it is hard to find a single book, but I asked if someone may know of a good reference book. Thank you for your response, it was very helpful.

It is not clear from the schematic if the 50 Ohm resistor, connected to + terminal of OP467GP is used only with external generator or if it is always present. If it is always present, the problem may be with the OP77 output current. Please take a look at page 6, figure 19 of http://www.analog.com/static/imported-file...Sheets/OP77.pdf for maximum output voltage for different resistive loads. The other problem, if the 50 Ohm resistor is always present, may occur from the analog switch resistance, which is in 30 - 60 Ohm range - comparable to resistor value.

The interface has changed in ADS 2011, unifying the FEM and Momentum stackup definitions. However, FEM remains restricted to 2.5D, with exception to few special 3D structures. I wonder if there are some real improvements in FEM engine compared to ADS 2009, except the GUI changes. In the other topic I have written about the problems with ADS deembedding, especially with thick conductors in Momentum. The response I've got (and I'm thankful for it) is that I should simulate the thick conductor line as a separate cell and then deeembed the line from schematic. This implies that Momentum (and maybe FEM) does not have a support for a real 2D port solver, and that it deembeds ports using analytical solutions. Other tools, such as HFSS, don't have such limitations. On the other hand, Momentum, and now FEM also, are very easy to setup for optimization via perturbation method. This is a very nice and useful feature. I hope that Agilent will improve the deembeding, so that these tools can become very usefull. Another thing to keep in mind is that FEM, opposed to Momentum, seems to calculate the solution inside a box. The problem is that box size is automatically computed, and in some cases it can affect the solution accuracy.

Ok, thank you. I'll try that.

Thank you for the idea. What about port settings for the thick conductor line? Should both ports be single ports?

Thank you for the response. I was thinking about a book which would be an extension to a course like this: http://www.cs.princeton.edu/courses/archive/fall05/cos471/

I have a problem with Agilent Momentum. When I try to deembed a line which is on thick conductor layer, Momentum issues a warning that the thick conductors are not supported for deembedding and that it will use 50 Ohms for de-embedding. Is there a solution for this problem?