rom67 0 7 августа, 2018 Опубликовано 7 августа, 2018 · Жалоба вышел хотфикс SIGRITY 2017, HOTFIX VERSION: 011 Fixed CCRs: SIGRITY2017 HF011 08-03-2018 ------------------------------------------------------------------------------------------------------------------------------- CCRID Product Title ------------------------------------------------------------------------------------------------------------------------------- 1926744 3D_EM Port is invalid because connected shape is too narrow error is not reported in PowerSI.err file 1885224 ASI_PI Allegro's mirrored via is not translated correctly 1946644 ASI_SI The dynamic ground shape is missing even with 'Ignore voids in engulfed static shapes' option enabled in SPDIF 1927038 OPTIMIZEPI Several problems related to OptimizePI TCL script run occur in batch mode 1890354 POWERDC Initialize FEM fail error is generated for PowerDC thermal simulation 1926224 POWERDC Resistors with values greater than 100 reappear in the canvas when Build Tree option is used multiple times 1928236 POWERDC PowerDC in 17.2 HF009 cannot recognize line continuation char "\" in TCL script in Linux, while in 17.2 HF008 it does 1928329 POWERDC PowerTree does not run the simulation and looks for missing current information on Disabled Sinks 1928875 POWERDC Resistance filter does not work 1928975 POWERDC Incorrect values calculated for Global Via Current and Constraint on Global Current Density (A/mm*mm) 1932407 POWERDC PowerDC cannot import a stackup file (*.csv) that is exported by PowerDC 1933500 POWERDC 2D E-Distribution plots display results incorrectly 1934406 POWERDC Import stackup using CSV file option cannot complete import operation in PowerDC 1948280 POWERDC PowerTree cannot read the value from Allegro netlist files 1917365 POWERSI PowerSI EMC/EMI analysis exits abruptly when using 40-bit pattern for current stimulus 1929068 POWERSI Check S-Parameter by BBS does not function properly if the path contains space characters 1946024 SPEED2000 Unable to correlate simulation results to measured; result from third-party tool is much closer to measured than SPDSIM 1909072 SYSTEMSI SystemSI PBA uses memory's pullup voltage value for VDDCA instead of using controllers's VDDQ value 1909075 SYSTEMSI SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s 1911297 SYSTEMSI SystemSI PBA (DDR) circuit simulations with 10K bits are not working in Linux 1916101 SYSTEMSI Lack of stimulus in file causes Serial Link Analysis to become unresponsive 1919562 SYSTEMSI SystemSI generates wrong timing bathtub curves in channel simulations for write and read 1920441 SYSTEMSI SystemSI correlation is not working in Windows and Linux when EBD model is used in READ cycle 1923679 SYSTEMSI System Explorer simulation aborts because of large time step value 1935195 SYSTEMSI Frequency Domain response simulation failed for some nets due to "<" and ">" in the net name 1894124 XCITEPI Large capacitance and resistance are reported in EPA results 1927092 XCITEPI VSDP header is missing port for pseudo bump 1933974 XCITEPI Via resistance is wrong in new clf+gds flow вышла база SIGRITY 2018 Fixed CCRs: SIGRITY2018 BASE 07-20-2018 ------------------------------------------------------------------------------------------------------------------------------- CCRID Product Title ------------------------------------------------------------------------------------------------------------------------------- 1861523 3D_EM Simulation is extremely slow for 3D-EM/Hybrid Cut and Stitch flow 1891759 3D_EM Cannot enable the port using TCL command 1909780 3D_EM 3D-EM reports "Engine last run failed" in the log file when running a case in user's Linux LSF 1921332 3D_EM Performing cutting and stitching operation and generating spds results in an error 1926744 3D_EM Port is invalid because connected shape is too narrow error is not reported in PowerSI.err file 1937912 3D_EM Multi-terminal circuits cause simulation to become unresponsive 1885224 ASI_PI Allegro's mirrored via is not translated correctly 1933491 ASI_PI TCL script sigrity::open document does not work correctly 1682898 ASI_SI Lower section of ERC/PCB Editor windows gets hidden under Windows task bar 1895159 ASI_SI Mirrored component with asymmetric outline is displayed with wrong outline at bottom layer 1918871 ASI_SI Square multi-drill padstack is not translated correctly 1938587 ASI_SI GND structures are lost after the translation of .brd file (directly or using SPDLinks) in Sigrity tools 1940376 ASI_SI Large fake antipad incorrectly appears after translation 1726802 OPTIMIZEPI After archiving, the path for the snp models in the layout file is wrong 1887758 OPTIMIZEPI OptimizePI shape process generates incorrect short errors 1917197 OPTIMIZEPI AmLibGen does not properly include SPICE circuit models for resistors 1923826 OPTIMIZEPI Impedance observations cannot be seen after cutting 1927038 OPTIMIZEPI Several problems related to OptimizePI TCL script run occur in batch mode 1822501 POWERDC PowerTree is unable to handle multi-pin series devices 1890354 POWERDC Initialize FEM fail error is generated for PowerDC thermal simulation 1893753 POWERDC Component center location should be updated when merging two design files together 1899910 POWERDC Extract PowerTree in Design does not recognize component value 1920529 POWERDC Setting output current ratio of VRM1 to 0% still outputs current after simulation 1920546 POWERDC MultiVRMs generate different temperature results 1922993 POWERDC When comparing two trees, zoom area is in sync between the trees, but zoom fit is not 1925235 POWERDC Multiple filament models fail due to overlapping vias 1926224 POWERDC Resistors with values greater than 100 reappear in the canvas when Build Tree option is used multiple times 1928236 POWERDC PowerDC in 17.2 HF009 cannot recognize line continuation char "\" in TCL script in Linux, while in 17.2 HF008 it does 1928329 POWERDC PowerTree does not run the simulation and looks for missing current information on Disabled Sinks 1928875 POWERDC Resistance filter does not work 1928975 POWERDC Incorrect values calculated for Global Via Current and Constraint on Global Current Density (A/mm*mm) 1928996 POWERDC Extract PowerTree in Design not parsing component values 1932407 POWERDC PowerDC cannot import a stackup file (*.csv) that is exported by PowerDC 1932659 POWERDC Pin resistance is not calculated by passing through multiple power nets 1933500 POWERDC 2D E-Distribution plots display results incorrectly 1934406 POWERDC Import stackup using CSV file option cannot complete import operation in PowerDC 1877194 POWERSI When switching the mode in PSI from ERC to Extraction, the layout view is still stuck on the impedance overlay 1916930 POWERSI TCL support required to show Y-axis in log scale 1917365 POWERSI PowerSI EMC/EMI analysis exits abruptly when using 40-bit pattern for current stimulus 1918816 POWERSI TCL command inserting shapes not working as expected 1921415 POWERSI ERC Report generation failed with script error 1929068 POWERSI Check S-Parameter by BBS does not function properly if the path contains space characters 1936971 POWERSI S600 in Sigrity 2018 exits unexpectedly in Red Hat Linux 7.4 environment 1805975 SPEED2000 TDR simulation does not run due to node errors 1912245 SPEED2000 Change the behavior of SystemSI to reject any SPICE file with "$" comments or have SPDSIM accept such files 1909075 SYSTEMSI SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s 1911297 SYSTEMSI SystemSI PBA (DDR) circuit simulations with 10K bits are not working in Linux 1916101 SYSTEMSI Lack of stimulus in file causes Serial Link Analysis to become unresponsive 1919562 SYSTEMSI SystemSI generates wrong timing bathtub curves in channel simulations for write and read 1923679 SYSTEMSI System Explorer simulation aborts because of large time step value 1935195 SYSTEMSI Frequency Domain response simulation failed for some nets due to "<" and ">" in the net name 1890918 TRANSLATOR Wirebonds are not translated using SPDLink 1909248 TRANSLATOR [PowerSI] Via diameter is changed with save-reopen operation 1917304 TRANSLATOR ODB++ is not translating properly, but it looks good in ODB++ Viewer 1920373 TRANSLATOR Rotation of wirebond shell is translated incorrectly 1921290 TRANSLATOR Traces on negative plane layer in ODB++ are not translated correctly 1943973 TRANSLATOR Need correct ODB++ translation of backdrill 1894124 XCITEPI Large capacitance and resistance are reported in EPA results 1933974 XCITEPI Via resistance is wrong in new clf+gds flow 1888419 XTRACTIM Unexpected inductance results are reported with low solution frequency setting in XtractIM 1908292 XTRACTIM EPA mode generates "Net loop L extraction" and "invalid data in file" errors 1918783 XTRACTIM Net Loop L Extraction Error 1920225 XTRACTIM In resource log file, print the run time in days:hr:min:sec in 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