Aleksei_Rostov 0 2 июля, 2020 Опубликовано 2 июля, 2020 · Жалоба Добрый день. С помощью buildroot собираю rootfs.cpio.gz в который добавил tcf агент. Ядро (zImage), BOOT.BIN и dt собрал из исходников Xilinx или в SDK. Загружаюсь: -------------------------------------------------------------------------------- Xilinx First Stage Boot Loader (TE modified) Release 2018.3 May 9 2019-09:18:05 Device IDCODE: 1372C093 Device Name: 7z030 (C) Device Revision: 1 -------------------------------------------------------------------------------- TE0715 TE_FsblHookBeforeHandoff_Custom Configure TE715 SI5338 Si5338 Init Registers Write. Si5338 Init Complete -------------------------------------------------------------------------------- U-Boot 2019.01 (Jun 22 2020 - 07:49:13 +0000) Xilinx Zynq ZC702 CPU: Zynq 7z030 Silicon: v3.1 DRAM: ECC disabled 1 GiB MMC: mmc@e0100000: 0 Loading Environment from SPI Flash... SF: Detected n25q256 with page size 256 By tes, erase size 4 KiB, total 32 MiB *** Warning - bad CRC, using default environment In: serial@e0000000 Out: serial@e0000000 Err: serial@e0000000 Net: ZYNQ GEM: e000b000, phyaddr ffffffff, interface rgmii-id eth0: ethernet@e000b000 U-BOOT for trenz Hit any key to stop autoboot: 0 Zynq> bootm 30000000 ## Loading kernel from FIT Image at 30000000 ... Using 'conf@1' configuration Verifying Hash Integrity ... OK Trying 'kernel@0' kernel subimage Description: Linux Kernel Type: Kernel Image Compression: uncompressed Data Start: 0x300000d4 Data Size: 4165888 Bytes = 4 MiB Architecture: ARM OS: Linux Load Address: 0x00080000 Entry Point: 0x00080000 Hash algo: sha1 Hash value: cf7e74cc2824daef369cf94a40ebe556ad6e3b00 Verifying Hash Integrity ... sha1+ OK ## Loading ramdisk from FIT Image at 30000000 ... Using 'conf@1' configuration Verifying Hash Integrity ... OK Trying 'ramdisk@0' ramdisk subimage Description: ramdisk Type: RAMDisk Image Compression: gzip compressed Data Start: 0x303fc378 Data Size: 1221778 Bytes = 1.2 MiB Architecture: ARM OS: Linux Load Address: unavailable Entry Point: unavailable Hash algo: sha1 Hash value: 6a734df666c7ec56efc59456cfc25acea63de606 Verifying Hash Integrity ... sha1+ OK ## Loading fdt from FIT Image at 30000000 ... Using 'conf@1' configuration Verifying Hash Integrity ... OK Trying 'fdt@0' fdt subimage Description: Flattened Device Tree blob Type: Flat Device Tree Compression: uncompressed Data Start: 0x303f92c8 Data Size: 12288 Bytes = 12 KiB Architecture: ARM Hash algo: sha1 Hash value: 8eb780b47e2abe5535963b3d84d43347a1943124 Verifying Hash Integrity ... sha1+ OK Booting using the fdt blob at 0x303f92c8 Loading Kernel Image ... OK Loading Ramdisk to 07ed5000, end 07fff492 ... OK Loading Device Tree to 07ecf000, end 07ed4fff ... OK Starting kernel ... Booting Linux on physical CPU 0x0 Linux version 5.4.0-xilinx (zynq@ubuntu) (gcc version 9.3.0 (Buildroot 2020.08-g it-00488-gc329495)) #1 SMP PREEMPT Wed Jul 1 07:29:21 PDT 2020 CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache OF: fdt: Machine model: xlnx,zynq-7000 earlycon: cdns0 at MMIO 0xe0000000 (options '115200n8') printk: bootconsole [cdns0] enabled Memory policy: Data cache writealloc Reserved memory: created CMA memory pool at 0x30000000, size 256 MiB OF: reserved mem: initialized node buffer@0, compatible id shared-dma-pool percpu: Embedded 15 pages/cpu s31820 r8192 d21428 u61440 Built 1 zonelists, mobility grouping on. Total pages: 260608 Kernel command line: earlycon Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear) mem auto-init: stack:off, heap alloc:off, heap free:off Memory: 766016K/1048576K available (6144K kernel code, 195K rwdata, 1800K rodata , 1024K init, 130K bss, 20416K reserved, 262144K cma-reserved, 0K highmem) rcu: Preemptible hierarchical RCU implementation. rcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. Tasks RCU enabled. rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies. rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 efuse mapped to (ptrval) slcr mapped to (ptrval) L2C: platform modifies aux control register: 0x72360000 -> 0x72760000 L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000 L2C-310 erratum 769419 enabled L2C-310 enabling early BRESP for Cortex-A9 L2C-310 full line of zeros enabled for Cortex-A9 L2C-310 ID prefetch enabled, offset 1 lines L2C-310 dynamic clock gating enabled, standby mode enabled L2C-310 cache controller enabled, 8 ways, 512 kB L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001 random: get_random_bytes called from start_kernel+0x260/0x420 with crng_init=0 zynq_clock_init: clkc starts at (ptrval) Zynq clock init sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025 , max_idle_ns: 440795209040 ns Switching to timer-based delay loop, resolution 3ns Console: colour dummy device 80x30 printk: console [tty0] enabled printk: bootconsole [cdns0] disabled Booting Linux on physical CPU 0x0 Linux version 5.4.0-xilinx (zynq@ubuntu) (gcc version 9.3.0 (Buildroot 2020.08-g it-00488-gc329495)) #1 SMP PREEMPT Wed Jul 1 07:29:21 PDT 2020 CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache OF: fdt: Machine model: xlnx,zynq-7000 earlycon: cdns0 at MMIO 0xe0000000 (options '115200n8') printk: bootconsole [cdns0] enabled Memory policy: Data cache writealloc Reserved memory: created CMA memory pool at 0x30000000, size 256 MiB OF: reserved mem: initialized node buffer@0, compatible id shared-dma-pool percpu: Embedded 15 pages/cpu s31820 r8192 d21428 u61440 Built 1 zonelists, mobility grouping on. Total pages: 260608 Kernel command line: earlycon Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear) mem auto-init: stack:off, heap alloc:off, heap free:off Memory: 766016K/1048576K available (6144K kernel code, 195K rwdata, 1800K rodata , 1024K init, 130K bss, 20416K reserved, 262144K cma-reserved, 0K highmem) rcu: Preemptible hierarchical RCU implementation. rcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. Tasks RCU enabled. rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies. rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16 efuse mapped to (ptrval) slcr mapped to (ptrval) L2C: platform modifies aux control register: 0x72360000 -> 0x72760000 L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000 L2C-310 erratum 769419 enabled L2C-310 enabling early BRESP for Cortex-A9 L2C-310 full line of zeros enabled for Cortex-A9 L2C-310 ID prefetch enabled, offset 1 lines L2C-310 dynamic clock gating enabled, standby mode enabled L2C-310 cache controller enabled, 8 ways, 512 kB L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001 random: get_random_bytes called from start_kernel+0x260/0x420 with crng_init=0 zynq_clock_init: clkc starts at (ptrval) Zynq clock init sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025 , max_idle_ns: 440795209040 ns Switching to timer-based delay loop, resolution 3ns Console: colour dummy device 80x30 printk: console [tty0] enabled printk: bootconsole [cdns0] disabled Calibrating delay loop (skipped), value calculated using timer frequency.. 666.6 6 BogoMIPS (lpj=3333333) pid_max: default: 32768 minimum: 301 Mount-cache hash table entries: 2048 (order: 1, 8192 bytes, linear) Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes, linear) CPU: Testing write buffer coherency: ok CPU0: Spectre v2: using BPIALL workaround CPU0: thread -1, cpu 0, socket 0, mpidr 80000000 Setting up static identity map for 0x100000 - 0x100060 rcu: Hierarchical SRCU implementation. smp: Bringing up secondary CPUs ... CPU1: thread -1, cpu 1, socket 0, mpidr 80000001 CPU1: Spectre v2: using BPIALL workaround smp: Brought up 1 node, 2 CPUs SMP: Total of 2 processors activated (1333.33 BogoMIPS). CPU: All CPU(s) started in SVC mode. devtmpfs: initialized VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4 clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911 2604462750000 ns futex hash table entries: 512 (order: 3, 32768 bytes, linear) pinctrl core: initialized pinctrl subsystem NET: Registered protocol family 16 DMA: preallocated 256 KiB pool for atomic coherent allocations cpuidle: using governor menu hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers. hw-breakpoint: maximum watchpoint size is 4 bytes. zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0x(ptrval) e0000000.serial: ttyPS0 at MMIO 0xe0000000 (irq = 25, base_baud = 6249999) is a xuartps printk: console [ttyPS0] enabled vgaarb: loaded SCSI subsystem initialized usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb mc: Linux media interface: v0.10 videodev: Linux video capture interface: v2.00 pps_core: LinuxPPS API ver. 1 registered pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@l inux.it> PTP clock support registered EDAC MC: Ver: 3.0.0 FPGA manager framework Advanced Linux Sound Architecture Driver Initialized. clocksource: Switched to clocksource arm_global_timer thermal_sys: Registered thermal governor 'step_wise' NET: Registered protocol family 2 tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear) TCP established hash table entries: 8192 (order: 3, 32768 bytes, linear) TCP bind hash table entries: 8192 (order: 4, 65536 bytes, linear) TCP: Hash tables configured (established 8192 bind 8192) UDP hash table entries: 512 (order: 2, 16384 bytes, linear) UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear) NET: Registered protocol family 1 RPC: Registered named UNIX socket transport module. RPC: Registered udp transport module. RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. PCI: CLS 0 bytes, default 64 Trying to unpack rootfs image as initramfs... Freeing initrd memory: 1196K hw perfevents: no interrupt-affinity property for /pmu@f8891000, guessing. hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available workingset: timestamp_bits=30 max_order=18 bucket_order=0 jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc. bounce: pool size: 64 pages io scheduler mq-deadline registered io scheduler kyber registered zynq-pinctrl 700.pinctrl: zynq pinctrl initialized brd: module loaded loop: module loaded libphy: Fixed MDIO Bus: probed CAN device driver interface libphy: MACB_mii_bus: probed Marvell 88E1510 e000b000.ethernet-ffffffff:00: attached PHY driver [Marvell 88E1 510] (mii_bus:phy_addr=e000b000.ethernet-ffffffff:00, irq=POLL) macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 27 (00 :0a:35:00:1e:53) e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k e1000e: Copyright(c) 1999 - 2015 Intel Corporation. ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver ehci-pci: EHCI PCI platform driver usbcore: registered new interface driver usb-storage i2c /dev entries driver cdns-i2c e0005000.i2c: 400 kHz mmio e0005000 irq 22 cdns-wdt f8005000.watchdog: Xilinx Watchdog Timer with timeout 10s EDAC MC: ECC not enabled Xilinx Zynq CpuIdle Driver started sdhci: Secure Digital Host Controller Interface driver sdhci: Copyright(c) Pierre Ossman sdhci-pltfm: SDHCI platform and OF driver helper mmc0: SDHCI controller on e0100000.mmc [e0100000.mmc] using ADMA ledtrig-cpu: registered to indicate activity on CPUs clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 5375 38477 ns timer #0 at (ptrval), irq=40 usbcore: registered new interface driver usbhid usbhid: USB HID core driver fpga_manager fpga0: Xilinx Zynq FPGA Manager registered NET: Registered protocol family 10 Segment Routing with IPv6 sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver NET: Registered protocol family 17 can: controller area network core (rev 20170425 abi 9) NET: Registered protocol family 29 can: raw protocol (rev 20170425) can: broadcast manager protocol (rev 20170425 t) can: netlink gateway (rev 20190810) max_hops=1 Registering SWP/SWPB emulation handler of-fpga-region fpga-full: FPGA Region probed hctosys: unable to open rtc device (rtc0) of_cfs_init of_cfs_init: OK ALSA device list: No soundcards found. Freeing unused kernel memory: 1024K Run /init as init process Starting syslogd: OK Starting klogd: OK Running sysctl: OK Saving random seed: random: dd: uninitialized urandom read (512 bytes read) OK Starting network: OK Starting tcf-agent: OK Welcome to Buildroot buildroot login: root # ifconfig eth0 192.168.2.10 # ifconfig eth0 Link encap:Ethernet HWaddr 00:0A:35:00:1E:53 inet addr:192.168.2.10 Bcast:192.168.2.255 Mask:255.255.255.0 UP BROADCAST MULTICAST MTU:1500 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) Interrupt:27 Base address:0xb000 lo Link encap:Local Loopback inet addr:127.0.0.1 Mask:255.0.0.0 inet6 addr: ::1/128 Scope:Host UP LOOPBACK RUNNING MTU:65536 Metric:1 RX packets:0 errors:0 dropped:0 overruns:0 frame:0 TX packets:0 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:0 (0.0 B) TX bytes:0 (0.0 B) # macb e000b000.ethernet eth0: link up (1000/Full) IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready random: fast init done В логе выдается, что tcf агент запущен, но при попытке подключиться к плате из Xilinx SDK, SDK выдает, что на таргете не запущен tcf-агент. Пингуюсь в обе стороны без проблем. Если заменить rootfs.cpio.gz из проекта Petalinux, то tcf агент работает без проблем. Что необходимо указать в настройках Buildroot или подредактировать в rootfs.cpio.gz или что то еще, чтобы tcf агент запустился? Цитата Поделиться сообщением Ссылка на сообщение Поделиться на другие сайты Поделиться
Aleksei_Rostov 0 7 октября, 2020 Опубликовано 7 октября, 2020 · Жалоба Все дело в зависимостях. По дефолту buildroot собирает с UcLIBC, а необходимо с GLIBC. Поэтому TCF агент будет работать корректно для Linux, собранном в Buildroot для Zynq 7000, если прописать в конфиге: BR2_TOOLCHAIN_BUILDROOT_CXX=y BR2_TOOLCHAIN_BUILDROOT_GLIBC=y Цитата Поделиться сообщением Ссылка на сообщение Поделиться на другие сайты Поделиться