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Хотфиксы OrCAD/Allegro 17.4

Давайте собирать здесь информацию о вышедших хотфиксах для версии 17.4.

Fixed CCRs: SPB 17.4 HF001
11-23-2019
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
2115805 ADW                DBEDITOR      'BOTH' in ALT_SYMBOLS prevents correct generation of part_table.ptf
2141840 ADW                FLOW_MGR      EDM Flow Manager crashes on opening TDO-enabled projects on some versions of Linux
567342  ALLEGRO_EDITOR     COLOR         Add option under View menu for 'load color view'
720274  ALLEGRO_EDITOR     COLOR         Add menu option for the 'colorview load' command
2077601 ALLEGRO_EDITOR     DATABASE      For multi-zone flex board with one and two layers, drill legend for mechanical hole not created in one-layer zone
2151260 ALLEGRO_EDITOR     DFM           DFF Copper Spacing - Trace to Thru via hole false error, typically on arc segments
2157524 ALLEGRO_EDITOR     DFM           DFF CF sliver violation not detected when shape formed is too narrow
2163835 ALLEGRO_EDITOR     DFM           PCB Editor crashes on moving line in board file
2167426 ALLEGRO_EDITOR     DRAFTING      The diameter symbol is in front of the measurements instead of being behind
2118231 ALLEGRO_EDITOR     DRC_CONSTR    Crash during DRC: DBDoctor exits with error 'Illegal database pointer encountered'
2150923 ALLEGRO_EDITOR     DRC_CONSTR    Via at SMD fit DRC not detected with rounded rectangle pads
2119099 ALLEGRO_EDITOR     EDIT_ETCH     When routing to an unused suppressed via padstack, PCB Editor is not following the cline to drill constraint value
2140643 ALLEGRO_EDITOR     EDIT_ETCH     Crash on editing board file
2155363 ALLEGRO_EDITOR     EDIT_ETCH     Unable to route with Hug or Shove selected as Bubble type and unused pad suppression enabled
2157174 ALLEGRO_EDITOR     EDIT_ETCH     Incremental move using ix for sliding via slides via in y direction as well for Pre-select operation
2140162 ALLEGRO_EDITOR     INTERACTIV    Using axlAirGap(),testing with a NPTH padstack which has no pad, the coordinates are swapped in return value.
2155499 ALLEGRO_EDITOR     INTERACTIV    Inconsistencies while defining and adding properties to text objects
2162490 ALLEGRO_EDITOR     INTERACTIV    OrCAD PCB Design crashes when modifying Outline Vertex
2161517 ALLEGRO_EDITOR     MULTI_USER    Allegro Symphony is slow
1934516 ALLEGRO_EDITOR     OTHER         Show measure returns a large value for Airgap when measuring gap between a pin with null pad and another pin
2160610 ALLEGRO_EDITOR     SCHEM_FTB     Import netlist directory path is not saved
2162492 ALLEGRO_EDITOR     SCHEM_FTB     Import netlist does not remember the last/latest import directory path
2164135 ALLEGRO_EDITOR     SCHEM_FTB     The Import Logic form is not able to remember the Import Directory path in release 17.2-2016, HotFix 059
2166451 ALLEGRO_EDITOR     SCHEM_FTB     Import Logic/ Netlist does not remember import directory path in release 17.2-2016, HotFix 059
2168387 ALLEGRO_EDITOR     SCHEM_FTB     Import Netlist directory is not saving in design.
2168915 ALLEGRO_EDITOR     SCHEM_FTB     Import Logic does not remember import directory
2172195 ALLEGRO_EDITOR     SCHEM_FTB     Path set in 'Import directory' while performing 'File' - 'Import' -'Logic/Netlist' is not remembered
2182677 ALLEGRO_EDITOR     SCHEM_FTB     Import Netlist does not remember the last 'Import directory' path
2182777 ALLEGRO_EDITOR     SCHEM_FTB     'File' - Import Logic/Netlist' does not remember the last 'Import directory' value
2139039 ALLEGRO_EDITOR     SHAPE         Same net shape to hole spacing is only detecting DRC and not voiding shape
2144493 ALLEGRO_EDITOR     SHAPE         Tapered Trace - 'Desired Angle' reset to default value (60)
2144663 ALLEGRO_EDITOR     SHAPE         Tapered shape - 'Desired Angle' reset to 60
2152607 ALLEGRO_EDITOR     SHAPE         Edit Shape Vertex slow to respond when degas holes are present
2166870 ALLEGRO_EDITOR     SHAPE         Tapered trace angle does not work
2173679 ALLEGRO_EDITOR     SHAPE         Taper trace does not keep the desired angle when form is closed
2136158 ALLEGRO_EDITOR     STEP          Update STEP Mapping Data Only should be a separate menu/command
1990594 ALLEGRO_EDITOR     UI_FORMS      The new browse window from Netlist Import fills in a name in the directory field
1621188 ALLEGRO_EDITOR     UI_GENERAL    Setup > Outlines>Design Outline should have Apply disabled in Edit mode
1699230 ALLEGRO_EDITOR     UI_GENERAL    Changes made in Visibility tab are lost
1833733 ALLEGRO_EDITOR     UI_GENERAL    Menu displays garbled text when customized for Chinese in release 17.2-2016
2156748 ALLEGRO_EDITOR     UI_GENERAL    Incorrect datatip display for pin without pin number
2051884 ALLEGRO_PROD_TOOLB CORE          Panelization with the Productivity Toolbox is deleting design outline
2136311 APD                EDIT_ETCH     Hug broken in slide command
2134146 APD                SHAPE         Dynamic shape not voiding consistently
1711460 APD                UI_GENERAL    'Help' - 'About' shows wrong design application name
2009024 ASI_SI             GUI           PCBSI Report file export fails on Linux
2154651 CONCEPT_HDL        CORE          Wire > NetGroup > Edit... crashes DE-HDL
2169550 CONCEPT_HDL        CORE          DE-HDL crashes on saving hierarchy for large designs
2106767 CONSTRAINT_MGR     SCM           Clicking Resolve in the 'Alias Property Conflict Report' does not perform any action
2162536 CONSTRAINT_MGR     UI_FORMS      Enabling Directly-Set filter in Physical or Spacing CSet worksheet crashes PCB Editor
2123632 F2B                BOM           BOM-HDL .rpt file does not adhere to settings defined
2142211 F2B                BOM           Unable to create comma separated BOM Report
1979056 PCB_LIBRARIAN      SYMBOL_EDITOR System Capture: Filled dots are shown as circles
2104538 PSPICE             AA_FLOW       Distribution defined in DIST property on part is not honored
2088188 PSPICE             AA_MC         PSpice AA MC log file is not showing error if distribution is not defined
2104482 PSPICE             AA_MC         Distribution cannot be defined at the global level in assign tolerance GUI
2111593 PSPICE             AA_MC         PSpice Advanced Analysis MC - distribution in global tolerance window does not work
2161864 PULSE              R2PLM         Second publish with CPM-derived item number and cadName set to $NUMBER causes 'an item is not unique' error
1784979 SIP_LAYOUT         DATABASE      Results are not consistent on turning on/off the pins/vias in the Color Dialog box using the Visibility tab
2020912 SIP_LAYOUT         UI_GENERAL    Capture Canvas Image will not save in .jpg format, only saves in .BMP format.
2092069 SIP_LAYOUT         UI_GENERAL    Generic: File browser does not append selected file extension if none provided, always uses original
2144754 SYSTEM_CAPTURE     DARK_THEME    create variant form has dark blue on dark black background.. can't read it
2170317 SYSTEM_CAPTURE     MISCELLANEOUS Custom forms do not appear in the proper size within the tool
2163119 SYSTEM_CAPTURE     NEW_PROJECT   Unable to place special symbols.
2166932 SYSTEM_CAPTURE     SELECTION_FIL Discrepancy in the total number of objects reported in the Selection Filter
2175529 TOPXP              GUI           topxp doesn't give warning/error when ngnd is not connected
2176710 TOPXP              GUI           lost s-param checking functions for wrapped s-param model in spice block
2179306 TOPXP              GUI           Need to have the option for DC level shift as default
2170140 TOPXP              PARALLELBUS_A Circuit/channel sim correlation does not produce output
2171205 TOPXP              PARALLELBUS_A SystemSI does not allow simulations beyond 1000 bits when Spectre is used

 

Fixed CCRs: SPB 17.4 HF002
01-10-2020
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
2172317 ADW                DBEDITOR      Adding a property to EDM root classification does not add to the child classifications
2175654 ADW                FLOW_MGR      Cannot see any flow files to select in EDM flow manager
2176681 ADW                FLOW_MGR      Message regarding error detected in the CPM file (FM-107) on opening or creating new project
2177303 ADW                FLOW_MGR      Error on opening and creating new project (FM-107)
2177411 ADW                FLOW_MGR      Opening ECAD designs throw bad configuration error after Java upgrade to 1.8.0_231.
2178451 ADW                FLOW_MGR      ERROR (FM-107) on opening project
1932831 ADW                LIBDISTRIBUTI fetch_dump stops responding intermittently when using HTTP over high latency networks
2175810 ADW                LIBDISTRIBUTI Incomplete copy of principal.jar during lib_dist_client/fetch_dump.
2182780 ALLEGRO_EDITOR     CROSS_SECTION Cross-section chart 'Draw options' - 'Layer Gradient Draw'/'Background Gradient Draw' not working properly
2182820 ALLEGRO_EDITOR     CROSS_SECTION Release 17.4-2019: Color Draw - Gradients is not working in via list viewer
2165940 ALLEGRO_EDITOR     DFM           DesignTrue mask to trace and mask to shape checking not performing correctly
2167385 ALLEGRO_EDITOR     DFM           DesignTrue DFF annular ring fiducial to antipad checks not working.
2167469 ALLEGRO_EDITOR     DFM           DesignTrue DFM: plated slot annular ring pad to mask checks inconsistent
2167972 ALLEGRO_EDITOR     DFM           Thieving vias are treated as antenna vias in DesignTrue DFF copper features antenna via checks
2183231 ALLEGRO_EDITOR     DFM           Design performance slow when DFF checks are turned on.
2163281 ALLEGRO_EDITOR     DRC_CONSTR    Pad-Pad Direct Connect waived constraint reappears after DRC update
2168354 ALLEGRO_EDITOR     DRC_CONSTR    Differential pair static phase is yellow, but nets are routed
2167870 ALLEGRO_EDITOR     DXF           Compose Shape: Imported DXF shape broken into arcs
2155376 ALLEGRO_EDITOR     EDIT_ETCH     Unwanted cline segment is added when neighboring cline is slided
2173191 ALLEGRO_EDITOR     EDIT_ETCH     Cannot create unique via structure
2177943 ALLEGRO_EDITOR     INTERFACES    PDF Export contains extra page for bond wires
2132476 ALLEGRO_EDITOR     MANUFACT      Silkscreen is different for rounded rectangle pads and rectangular pads
2136257 ALLEGRO_EDITOR     MANUFACT      'Clear soldermask pad' option is not working in 'Auto Silkscreen'
2146676 ALLEGRO_EDITOR     MANUFACT      Autosilk bug causes WARNING(SPMHA1-36): Illegal LINE identifier -- while running a symbol update
2113054 ALLEGRO_EDITOR     MULTI_USER    UDbidRange error in Symphony team design
2121348 ALLEGRO_EDITOR     MULTI_USER    Changes are not updated for some users in a team in Symphony
2161495 ALLEGRO_EDITOR     MULTI_USER    Symphony: Changes not saved with 'rejected by server' and 'Waiting for a UDbidRange' messages
2177830 ALLEGRO_EDITOR     MULTI_USER    Symphony not writing back to the master
2176609 ALLEGRO_EDITOR     PAD_EDITOR    Padstack Editor should be updated for Slot Hole to prevent Secondary Drill tab from being shown.
2184958 ALLEGRO_EDITOR     PLACEMENT     Quickplace fails to place components with the ALT_SYMBOL property
1940677 ALLEGRO_EDITOR     SCRIPTS       Commands in two script files executed in the incorrect order
2046472 ALLEGRO_EDITOR     SCRIPTS       Replay of script to set paper size in PDF OUT shows "Value for field is not legal"
2185517 ALLEGRO_EDITOR     UI_FORMS      Route Automatic form flicker when adding a new pass to Routing Passes tab
2188939 ALLEGRO_EDITOR     UI_FORMS      Visibility filters for pin numbers of chip-on-board wire bond die bump
2088685 ALLEGRO_EDITOR     UI_GENERAL    Memory leak and performance degradation opening 1000 .dra databases
2092690 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor slows down during opening of 1000 databases
2160120 ALLEGRO_EDITOR     UI_GENERAL    When using Pop Mirror funckey, component jumps to origin in OrCAD PCB Designer
2184444 ALLEGRO_EDITOR     UI_GENERAL    Highlight command replaces assigned color output and Dehighlight does not get it back
2204326 ALLEGRO_EDITOR     UI_GENERAL    Allegro_html environment variable cross-probing behavior different in release 17.4-2019 than 17.2-2016
2194007 ALLEGRO_EDITOR     VALOR         Release 17.4-2019: Cannot generate ODB++ output with the Expert Suite bundle licenses
2176543 ALLEGRO_LIB_CRT    CORE          Variable DFA_DEV_CLASS is not being exported into the Allegro footprint
1500285 APD                EDIT_ETCH     'Route' - 'Slide' performs erratically when fillets are present where the cline sizes transition
2185101 CAPTURE            BACKANNOTATE  Release 17.4-2019: Design Sync does not work on design with occurrence properties
2188890 CAPTURE            BACKANNOTATE  Design Sync not working on hierarchical designs.
2196225 CAPTURE            BACKANNOTATE  Unable to Design Sync Board to Schematic
2181901 CAPTURE            DRC           Unable to delete DRC Markers in release 17.4-2019
2186321 CAPTURE            DRC           'Show DRC output' in DRC window does not remember NONE option
2190356 CAPTURE            DRC           Cannot delete DRC-markers in schematic
2191194 CAPTURE            DRC           Cannot remove DRC markers in the Design rule check GUI
2202656 CAPTURE            DRC           Capture release 17.4-2019: Delete existing DRCs does not work
2176603 CAPTURE            NETLIST_ALLEG Differences shown in design sync dialog for a CM-enabled project even if schematic and board are in sync
2195754 CAPTURE            NETLIST_ALLEG Design Sync giving the same report even if the connection exist
2172767 CONCEPT_HDL        CORE          DE-HDL crashes on renaming signal on an interface with a second tab with the symbol open
2174515 CONCEPT_HDL        CORE          No architecture declaration in the source file message while doing Generate View for Hierarchical split symbol .
2177255 CONCEPT_HDL        CORE          DE-HDL stops responding on Copy-Paste of properties from one instance to another
2179334 CONCEPT_HDL        CORE          The database version tag '<schemaVersion>' is not updated for release 17.4-2019
2173568 CONCEPT_HDL        INTERFACE_DES DE-HDL crashes when drawing a wire to a netgroup
2170851 CONCEPT_HDL        OTHER         DE-HDL menu related message not clear
2173009 CONCEPT_HDL        OTHER         Launching Project Manager (projmgr.exe) takes time to get license from license server
2053288 CONSTRAINT_MGR     INTERACTIV    Constraint Manager: region deleted even on clicking 'NO'
1988160 CONSTRAINT_MGR     OTHER         Clicking on CSet link in Show Constraints form does not go to CSet in CM
2185694 CONSTRAINT_MGR     OTHER         Relative prop delay values in 17.4-2019 do not show pin pairs on choosing Analyze from popup on the Match Group
2187251 CONSTRAINT_MGR     OTHER         Constraint Manager crashes when clicking on the cell for the MAX_PARALLEL rule
2174345 CONSTRAINT_MGR     SCHEM_FTB     Running Import Logic on an out-of-sync board does not bring in the constraints and connectivity
2187242 CONSTRAINT_MGR     UI_FORMS      CSet names from the 'Value Filter' not sorted alphabetically
2195944 CONSTRAINT_MGR     UI_FORMS      Re-launching CM does not retain the last state
2195948 CONSTRAINT_MGR     UI_FORMS      UI issues with CM in release 17.4 - Expanded state of WS is not getting preserved on applying object filters.
2175399 PSPICE             ENVIRONMENT   PSpice AA Topics are missing from Learning Resources for release 17.4-2019
2174141 PSPICE             NETLISTER     Netlister not able to pass local parameter in specific case for complex hierarchical designs
2176668 PULSE              UNIFIED_SEARC 3D STEP models are not downloaded for some providers
2107770 SCM                NETLISTER     Error (SPCOHD-198) regarding incorrect signal syntax on netlisting
2172198 SIP_LAYOUT         DIE_ABSTRACT_ SiP Layout uses 25GB memory for showing IC details and does not finish command for showing details
2090037 SIP_LAYOUT         INTERACTIVE   Batch Layer Compare: cannot check quadrant against another symmetrical quadrant in same design using Mirror/Rotate
2175747 SIP_LAYOUT         ORBITIO_IF    Support component height translation between OrbitIO and Allegro layout editor
2057538 SIP_LAYOUT         STREAM_IF     Streaming out a design with embedded dual-sided symbol (eBar) causes inadvertent mirrored symbol in .sf file
2187945 SIP_LAYOUT         STREAM_IF     Stream out causes crash
2165064 SIP_LAYOUT         WIREBOND      Wire Bond push and shove tools not working in a constraint area.
2182331 SYSTEM_CAPTURE     CROSSPROBE    Cross-probe from System Capture to Allegro PCB Editor loop back issues
2167994 SYSTEM_CAPTURE     EDIT_SEARCHRE Unable to edit a net name on canvas after modifying it using an external editor
2168628 SYSTEM_CAPTURE     EDIT_SEARCHRE Find Results: pop-up Edit menu does not appear for user property with NULL value
2166980 SYSTEM_CAPTURE     PROJECT_EXPLO Navigating signals from the Navigation viewer jumps to the project viewer
1996873 SYSTEM_CAPTURE     UI            Incorrect message to resolve conflict during part packaging
2168585 SYSTEM_CAPTURE     UI            Error message from the "Violation Window" does not resolve '%S'
2166933 SYSTEM_CAPTURE     WIRING        Visible net properties are not getting moved with the circuit move

 

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Fixed CCRs: SPB 17.4 HF003
02-7-2020
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
2174984 ADW                DBEDITOR      Local Flow Verify - Failed to verify the part due to the error null  - FAILED
2180529 ADW                DBEDITOR      Unable to release a part - For logical part, pack type is present in chips.prt but missing in ptf
2193985 ADW                PART_BROWSER  Part Information Manager not displaying DRA footprints in lower-level folders
2195842 ALLEGRO_EDITOR     ARTWORK       Drill Symbol Triangle has an offset in Artwork
2191531 ALLEGRO_EDITOR     DATABASE      Export libraries cannot export package
2167460 ALLEGRO_EDITOR     DFM           DesignTrue annular ring SMD pin to antipad checks not working in HotFix 058
2186669 ALLEGRO_EDITOR     DFM           DFF check of 'Copper Spacing: Shape to Shape' should not generate DRC for shapes generated for teardrop
2184335 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor stops responding when routing an arc by using the 'Connect' command
2199429 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor stops responding when routing a cline
1744042 ALLEGRO_EDITOR     GRAPHICS      Unused pad suppression is not working on a few nets
2200146 ALLEGRO_EDITOR     IN_DESIGN_ANA On creating groups for Return Path Analysis, PCB Editor crashes
2177214 ALLEGRO_EDITOR     PAD_EDITOR    Import/Export .pxml file issue: thermal data is not imported
2179169 ALLEGRO_EDITOR     PLACEMENT     Via array staggered not working
2183401 ALLEGRO_EDITOR     SCHEM_FTB     17.4 Design sync is not working with spaces in the path
2193390 ALLEGRO_EDITOR     SCHEM_FTB     Capture crashes when board filename contains a space
2193886 ALLEGRO_EDITOR     SCHEM_FTB     Capture crashes if new layout name or path has spaces
2193896 ALLEGRO_EDITOR     SCHEM_FTB     Design Sync fails when there is space character in project directory
2205386 ALLEGRO_EDITOR     SCHEM_FTB     Capture 17.4 goes into 'not responding' mode when the design sync contains space or different characters
2206402 ALLEGRO_EDITOR     SCHEM_FTB     Design sync in capture stops responding if there are spaces in directory name
2207279 ALLEGRO_EDITOR     SCHEM_FTB     Design sync does not work. Gives error about something in session log, that is not there.
2211384 ALLEGRO_EDITOR     SCHEM_FTB     Design Sync fails when there is space character in project directory
2212155 ALLEGRO_EDITOR     SCHEM_FTB     Capture crash on creating new layout when design file path has space in it
2214652 ALLEGRO_EDITOR     SCHEM_FTB     Capture crash on creating new layout because of space in board filename
2199694 ALLEGRO_EDITOR     SHAPE         Board crashes with Shape update
2190606 ALLEGRO_EDITOR     UI_FORMS      Custom SKILL form display gets extended  in release 17.4-2019
2190607 ALLEGRO_EDITOR     UI_FORMS      Property edit/assign window does not show Value column
2197816 ALLEGRO_EDITOR     UI_FORMS      In File > Import Logic/Netlist, TAB key selection is not working properly
2197844 ALLEGRO_EDITOR     UI_FORMS      Add space after the X and Y labels in the Define Grid window
2207434 ALLEGRO_EDITOR     UI_FORMS      GUI from SKILL routines are all truncated in release 17.4-2019 but are fine in previous releases
2213968 ALLEGRO_EDITOR     UI_FORMS      Issue with Property Edit - 'DYN_THERMAL_CON_TYPE ' Assign form: Form can be resized but is not dynamic
2215590 ALLEGRO_EDITOR     UI_FORMS      Edit property window has column with fixed size
2216405 ALLEGRO_EDITOR     UI_FORMS      assign window for Property Edit does not show Value column
2191455 ALLEGRO_EDITOR     UI_GENERAL    Alt key removes heads up display
2195848 ALLEGRO_EDITOR     UI_GENERAL    Panning does not work in 17.4 when pcb_autoroam environment variable is set
2205534 ALLEGRO_EDITOR     UI_GENERAL    Allegro editors and viewers crash if allegro_history set to 0.
2168018 ALLEGRO_PROD_TOOLB CORE          PCB Design Compare - Limit check to outline extents only functionality
2172272 ALLEGRO_PROD_TOOLB CORE          Placing a module in Fab panelization gives error message regarding handling nil
2163792 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator translating symbol names incorrectly
2079742 APD                DIE_GENERATOR Die symbol property reset does not work
2200707 APD                PADSTACK_EDIT Pad Editor cannot save the pad and cannot close it.
2197201 CAPTURE            DRC           PCB Footprint symbols in a completed 17.2 design are reported as missing in Capture Online DRC
2190454 CAPTURE            NETLIST_ALLEG Cross-section layers not creating in Constraint Manager in release 17.4-2019
2191880 CAPTURE            NETLIST_ALLEG Design sync is not respecting the character length limit specified in Create Netlist dialog under Setup
2195552 CAPTURE            NETLIST_ALLEG Sync between Capture and PCB Editor fails if custom PCB Footprint property is used
2196312 CAPTURE            NETLIST_ALLEG Design sync is not respecting the character length limit specified in Create Netlist dialog under Setup
2203680 CAPTURE            NETLIST_ALLEG Netlsiting displays errors but the log file is empty
2198474 CAPTURE            PCBFLOW       Netrev process continuously running in background even when capture is left idle and nothing is happening
2104576 CONCEPT_HDL        CORE          Validating physical part information for components in design - DE-HDL stops responding for 2 minutes
2184466 CONCEPT_HDL        CORE          Choosing 'Rename signal' should prompt to save all pages
2186418 CONCEPT_HDL        CORE          Allegro Design Entry HDL crashes when run from command line
2187234 CONCEPT_HDL        CORE          Layer specific constraints are displayed incorrectly on the canvas
2187237 CONCEPT_HDL        CORE          Restrict modifying the text size of attributes on the canvas when a component is locked
2164539 CONCEPT_HDL        CREFER        Crefer missing when instance and part names are same
2195341 CONCEPT_HDL        CREFER        crefer treats all notes as left-justified in release 17.2-2016, HotFix 061
2191513 CONCEPT_HDL        OTHER         net_spacing_type cannot be deleted from nets
2211141 CONSTRAINT_MGR     ANALYSIS      CM physical - add via to from Library stops responding in release 17.4 HotFix 002
2213280 CONSTRAINT_MGR     DATABASE      Undesired multiple Targets set for a single Matched Group in CM
2187885 CONSTRAINT_MGR     UI_FORMS      Switching worksheets from "CSet Assignment Matrix" to other worksheet is slow
2195942 CONSTRAINT_MGR     UI_FORMS      Directive CM_FILTER_SKILL_DEFINED_PSCSETS is not working in release 17.4, HotFix 001
2175941 INSTALLATION       BASE          "Anyone who uses this computer (All Users)" is disabled even when the user is with Administrator privileges.
2195765 INSTALLATION       BASE          'Install for all users' is grayed out while installing release 17.4-2019
2203319 INSTALLATION       BASE          "Anyone who uses this computer (All Users)" is disabled even when the user is with Administrator privileges.
2177200 ORBITIO            LEFDEFINTERFA OrbitIO stops responding when importing Innovus created def
2180100 PSPICE             LIBRARIES     Incorrect search result and message for EVALAA
2166988 PULSE              R2PLM         Invalid credentials during login: require to close and run R2PLM
2195275 PULSE              R2PLM         Stale BOM is published unless BOM refresh icon is clicked
2189236 PULSE              UNIFIED_SEARC "+" in part name causing errors in Search
2206626 PULSE              UNIFIED_SEARC Search Providers does not allow to place parts and keeps waiting for result
2195018 SCM                SETUP         Adding PINUSE column to CCP crashes SCM
2187247 SIG_EXPLORER       OTHER         SigXPlorer crashes when launching Help > About
2188742 SIG_EXPLORER       OTHER         SigXPlorer cannot be launched with Aurora in release 17.4-2019
2190608 SYSTEM_CAPTURE     ARCHIVER      Error regarding missing cell on archiving a design
2173730 SYSTEM_CAPTURE     DOCUMENTATION Application notes refer to incorrect location in release 17.4-2019
2185147 SYSTEM_CAPTURE     DRC           Crash while executing Tcl command 'setDRC' before opening the project
2168976 SYSTEM_CAPTURE     PACKAGER      RefDes conflict violation does not appear when PACK_IGNORE is removed from a part and a conflict is created
2168980 SYSTEM_CAPTURE     PACKAGER      RefDes disappears from the part because of PACK_IGNORE when doing a Copy/Paste

 

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