[Maverick_ 15]

/////////////////////////////////////////////////////////////////////////////////////////////////
	
	//Scatter Gather DMA controller 2

	printf( "\n\n------------- Scatter DMA 2---------------\n\n" );

	//create descriptors in the mapped memory
	struct alt_avalon_sgdma_packed  *sgdma_desc01=sdram_16MB_add;
	struct alt_avalon_sgdma_packed  *sgdma_desc02=sdram_16MB_add+sizeof(struct alt_avalon_sgdma_packed);
	struct alt_avalon_sgdma_packed  *sgdma_desc03=sdram_16MB_add+2*sizeof(struct alt_avalon_sgdma_packed);
	struct alt_avalon_sgdma_packed  *sgdma_desc_empty0=sdram_16MB_add+3*sizeof(struct alt_avalon_sgdma_packed);

	//Address to the physical space
	void* sgdma_desc1_phys0=(void*)SDRAM_16_BASE;
	void* sgdma_desc2_phys0=(void*)SDRAM_16_BASE+sizeof(struct alt_avalon_sgdma_packed);
	void* sgdma_desc3_phys0=(void*)SDRAM_16_BASE+2*sizeof(struct alt_avalon_sgdma_packed);
	void* sgdma_desc_empty_phys0=(void*)SDRAM_16_BASE+3*sizeof(struct alt_avalon_sgdma_packed);



	//configure the descriptor
	initDescriptor(sgdma_desc01,(void*)DUALPORT_RAM_0_BASE,(void*)(SDRAM_64_BASE+40),  
			sgdma_desc2_phys0,8*20, //sgdma_desc2_phys
			( _SGDMA_DESC_CTRMAP_OWNED_BY_HW));

	initDescriptor(sgdma_desc02,(void*)DUALPORT_RAM_1_BASE,(void*)(SDRAM_64_BASE+120),
			sgdma_desc_empty_phys0,8*20,
			( _SGDMA_DESC_CTRMAP_OWNED_BY_HW)); 

	/*initDescriptor(sgdma_desc01,(void*)ONCHIP_MEMORY_BASE,(void*)(SDRAM_64_BASE),
			sgdma_desc_empty_phys,4*20,
			( _SGDMA_DESC_CTRMAP_OWNED_BY_HW));*/

	/*initDescriptor(sgdma_desc3,(void*)SDRAM_64_BASE,(void*)MEMORYDMA_M_WRITE_MYBUS_BASE,
			sgdma_desc_empty_phys,4*30,
			(_SGDMA_DESC_CTRMAP_WRITE_FIXED_ADDRESS | _SGDMA_DESC_CTRMAP_OWNED_BY_HW));*/

	initDescriptor(sgdma_desc_empty0,NULL,NULL,
			sgdma_desc_empty_phys0,0,
			(_SGDMA_DESC_CTRMAP_WRITE_FIXED_ADDRESS));



	//map memory of the control register
	h2p_lw_sgdma_addr=virtual_base + ( ( unsigned long  )( ALT_LWFPGASLVS_OFST + 0x40 ) & ( unsigned long)( HW_REGS_MASK ) );
	printf( "sgma2 addr %08x\n", ((uint32_t *)h2p_lw_sgdma_addr));
	printf( "sgma2 status  %08x\n", *((uint32_t *)h2p_lw_sgdma_addr));

	////fill the data space
	//for (long int i=0;i<256; i++){
	//	*((uint32_t *)sdram_64MB_add+i)=i;
	//}



	//init the SGDMA controller
	init_sgdma(_SGDMA_CTR_IE_CHAIN_COMPLETED);

	debugPrintRegister();

	//set the address of the descriptor
	setDescriptor(sgdma_desc1_phys0);

	//start the transfer
	setControlReg(_SGDMA_CTR_IE_CHAIN_COMPLETED|_SGDMA_CTR_RUN);

	debugPrintRegister();

	//wait until transfer is complete
	waitFinish();
	
	//for (long int i=0;i<256; i++){
	//printf( "%d\n", *((uint32_t *)sdram_64MB_add+i));
	//	}
	printf( "/*///////////////////*/////////////////*/ \n");
	for (long int i=0;i<256; i++){
	//printf( "%d\n", *((uint64_t *)sdram_64MB_add+i));
	printf("%" PRIx64 "\n",  *((uint64_t *)sdram_64MB_add+i));
		}

	//printf( "////////////////////////////////////// \n");
	//for (int i=0;i<40;i++){
	//printf( "%d\n", *((uint64_t *)h2p_rom_addr+i));
	//printf("%" PRIx64 "\n",  *((uint64_t *)h2p_rom_addr+i));
	//}


	debugPrintDescriptorStatus(sgdma_desc01);

	//stop the core by clearing the run register
	setControlReg(_SGDMA_CTR_IE_CHAIN_COMPLETED);

	debugPrintDescriptorStatus(sgdma_desc01);

////////work interupt receive (double_edge_detector_irq) ///////////////////////////////////////////////////////////

       //h2p_intr_capturer_addr
	*(uint64_t *)h2p_intr_capturer_addr = 2;
	for (int k = 0; k < 8; k++) { 
	printf( "intr_capturer k = %d\n", *((uint32_t *)h2p_intr_capturer_addr+k)); 
	}

пытаюсь захватить вырабатываемое прерывание модулем на логике, чтобы знать что прерывание действительно было.

создал в платформ дизайнере проект (скришот вложение)

написал программу (см выше) - извините не привык к новому движку

сделал так сказать обработчик прерываний на логике

library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;

 entity double_edge_detector_irq is
  GENERIC(
       Num_bit  : INTEGER := 64);     
    port ( 
        clk   : in std_logic;
        rst   : in std_logic;
        irq_in   : in std_logic;
		
		-- bus Avalon MM
		avs_address : in std_logic_vector (1 downto 0);
		avs_readdata : out std_logic_vector ((Num_bit-1) downto 0);
		avs_write 	: in std_logic;
		avs_read 	: in std_logic;
		avs_writedata : in std_logic_vector ((Num_bit-1) downto 0) 
       
    );
 end double_edge_detector_irq;

 architecture rtl of double_edge_detector_irq is

 signal din_delayed1 :std_logic;
 signal reg_change :std_logic;
 signal reg_data : std_logic_vector ((Num_bit-1) downto 0); 
 signal count : std_logic_vector (((Num_bit/2)-1) downto 0);

 begin
    process(clk, rst)
    begin
	if rst = '1' then
		din_delayed1 <= '0';
	 elsif rising_edge(clk) then
        din_delayed1 <= irq_in;
     end if;
    end process;

    reg_change <= (din_delayed1 xor irq_in); --rising or falling edge (0 -> 1 xor 1 -> 0)
	
	process(clk, rst)
    begin
	if rst = '1' then
		count <=  (others => '0');
	 elsif rising_edge(clk) then
		if  avs_write = '1' then
			count <= avs_writedata(((Num_bit/2)-1) downto 0);
		else
			if reg_change = '1' then
				count <= std_logic_vector(unsigned(count) + 1);
			end if;
		end if;	
	 end if;
    end process;	
	
	process(clk, rst)
    begin
	 if rst = '1' then
		avs_readdata <=  (others => '0');
	 elsif rising_edge(clk) then
		if avs_read = '1' then
			if avs_address = "00" then
				avs_readdata <= reg_data((Num_bit-2) downto 0)&reg_change;
			elsif avs_address = "01" then	
				avs_readdata(31 downto 0) <= count;
            end if;
         end if;
     end if;
    end process;

 end rtl;

 

пытаюсь считать на модуле обработчика прерывания - по нулям (программа после

////////work interupt receive (double_edge_detector_irq) ///////////////////////////////////////////////////////////

)...

Может кто-то сталкивался с такой проблемой - прошу помощи

 

Изменено 12 августа, 2019 пользователем Maverick_