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kostyan1

LPC1788 + STN LCD и внутреняя ОЗУ

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Начал осваивать LPC1788 и хочется использовать простенький монохромный экран 320 на 240. Код с ручным дерганием есть, но хотелось бы аппаратной радости! Буфер для картинки для моего дисплея всего 9600 байт. Внешнее ОЗУ использовать не планируется. На ките взял LCD пример, чтото настроил своего и смотрю ноги на экране - както дергаются, если в LCDUPBASE указан адрес ВНЕШНЕЙ озу. Но если задаю в регистр адрес внутреннего буфера - то нужные ноги не дергаются совсем.

 

Как то можно использовать внутренее озу для LCD драйвера, или это дело заточено под внешнюю SDRAM?

 

Код инициализации примерно такой:

 


#include <nxp/iolpc1788.h>
#include "drv_clk.h"
#include "arm_comm.h"
#include "drv_stn_lcd_1bpp.h"

#define C_GLCD_PIX_CLK          (6.4MHZ)

#define LCD_MEMORY_SIZE (240 * 320 / 8)

#pragma data_alignment=8
__no_init unsigned char LCDMemory[LCD_MEMORY_SIZE];

extern Int32U SDRAM_VRAM_BASE_ADDR;

#define LCD_VRAM_BASE_ADDR ((Int32U)&SDRAM_VRAM_BASE_ADDR)
#define LCD_CURSOR_BASE_ADDR ((Int32U)0x20088800)

void lcdInit(void)
{	
// Assign pins
IOCON_P2_02 = 0x27;
IOCON_P2_03 = 0x27;
IOCON_P2_04 = 0x27;
IOCON_P2_05 = 0x27;
IOCON_P2_06 = 0x26;
IOCON_P2_07 = 0x26;
IOCON_P2_08 = 0x26;
IOCON_P2_09 = 0x26;
/*Back light enable*/
//	FIO2DIR_bit.P2_1 = 1;
//	FIO2SET = (1<<1);

// Init GLCD cotroller	
PCONP_bit.PCLCD = 1;      // enable LCD controller clock
CRSR_CTRL_bit.CrsrOn = 0; // Disable cursor
LCD_CTRL_bit.LcdEn = 0;   // disable GLCD controller
LCD_CTRL_bit.LcdBpp= 0;   // 1 bpp
LCD_CTRL_bit.LcdBW = 1;   //
LCD_CTRL_bit.LcdMono8 = 0;
LCD_CTRL_bit.LcdTFT = 0;   // STN panel
LCD_CTRL_bit.LcdDual =0;   // single panel
LCD_CTRL_bit.BGR   = 0;   // notmal output
LCD_CTRL_bit.BEBO  = 0;   // little endian byte order
LCD_CTRL_bit.BEPO  = 0;   // little endian pix order
LCD_CTRL_bit.LcdPwr= 0;   // disable power

LCD_CFG_bit.CLKDIV = CLK_GetClock(CLK_PERIPH) / (Int32U)C_GLCD_PIX_CLK;
LCD_POL_bit.BCD    = 0;   // bypass inrenal clk divider
LCD_POL_bit.CLKSEL = 0;   // clock source for the LCD block is HCLK
LCD_POL_bit.IVS    = 0;   // LCDFP pin is active LOW and inactive HIGH
LCD_POL_bit.IHS    = 0;   // LCDLP pin is active LOW and inactive HIGH
LCD_POL_bit.IPC    = 0;   // data is driven out into the LCD on the falling edge
LCD_POL_bit.IOE    = 0;   // active high
LCD_POL_bit.CPL    = C_GLCD_H_SIZE-1;
// init Horizontal Timing
LCD_TIMH_bit.HBP   =  C_GLCD_H_BACK_PORCH - 1;
LCD_TIMH_bit.HFP   =  C_GLCD_H_FRONT_PORCH - 1;
LCD_TIMH_bit.HSW   =  C_GLCD_H_PULSE - 1;
LCD_TIMH_bit.PPL   = (C_GLCD_H_SIZE/16) - 1;
// init Vertical Timing
LCD_TIMV_bit.VBP   =  C_GLCD_V_BACK_PORCH;
LCD_TIMV_bit.VFP   =  C_GLCD_V_FRONT_PORCH;
LCD_TIMV_bit.VSW   =  C_GLCD_V_PULSE;
LCD_TIMV_bit.LPP   =  C_GLCD_V_SIZE - 1;
// Frame Base Address doubleword aligned
//LCD_UPBASE         =  0x40000000;//LCD_VRAM_BASE_ADDR & ~7UL ;
//  	LCD_LPBASE         =  LCD_VRAM_BASE_ADDR & ~7UL ;
//	LCD_UPBASE = 0x40000100;
//	LCD_LPBASE = 0x40000100;
LCD_UPBASE         =  ((unsigned int)LCDMemory) & ~7UL ;
}

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Однако как говорится "сам дурак". Чтение рулесов и лазание по примерам помогли запустить PG320240WRFH с использованием внутреннего озу:

 

#define C_GLCD_PIX_CLK          (6*1000000l)

__no_init unsigned char* LCDMemory;

extern Int32U SDRAM_VRAM_BASE_ADDR;

#define LCD_VRAM_BASE_ADDR ((Int32U)&SDRAM_VRAM_BASE_ADDR)
#define LCD_MEMORY_BASE_ADDR ((Int32U)0x20004000)

void lcdInit(void)
{	
// Assign pins
IOCON_P2_02 = 0x27;
IOCON_P2_03 = 0x27;
IOCON_P2_04 = 0x27;
IOCON_P2_05 = 0x27;
IOCON_P2_06 = 0x26;
IOCON_P2_07 = 0x26;
IOCON_P2_08 = 0x26;
IOCON_P2_09 = 0x26;
/*Back light enable*/
//	FIO2DIR_bit.P2_1 = 1;
//	FIO2SET = (1<<1);

// Init GLCD cotroller	
PCONP_bit.PCLCD = 1;      // enable LCD controller clock
CRSR_CTRL_bit.CrsrOn = 0; // Disable cursor
LCD_CTRL_bit.LcdEn = 0;   // disable GLCD controller
LCD_CTRL_bit.LcdBpp= 0;   // 1 bpp
LCD_CTRL_bit.LcdBW = 1;   //
LCD_CTRL_bit.LcdMono8 = 0;
LCD_CTRL_bit.LcdTFT = 0;   // STN panel
LCD_CTRL_bit.LcdDual = 0;   // single panel
LCD_CTRL_bit.BGR   = 0;   // notmal output
LCD_CTRL_bit.BEBO  = 0;//1;   // little endian byte order
LCD_CTRL_bit.BEPO  = 1;//1;//0;   // little endian pix order
LCD_CTRL_bit.LcdPwr= 0;   // disable power

LCD_CFG_bit.CLKDIV = CLK_GetClock(CLK_PERIPH) / (Int32U)C_GLCD_PIX_CLK;
LCD_POL_bit.BCD = 0;   // bypass inrenal clk divider
LCD_POL_bit.CLKSEL = 0;   // clock source for the LCD block is HCLK
LCD_POL_bit.IVS = 0;   // LCD_FP pin is active HIGH and inactive LOW
LCD_POL_bit.IHS = 0;   // LCD_LP pin is active HIGH and inactive LOW
LCD_POL_bit.IPC = 0;//0;   // data is driven out into the LCD on the falling edge
LCD_POL_bit.IOE = 0;   // active high
LCD_POL_bit.CPL = 80-1;//320 - 1;//80 - 1;//320-1;
LCD_POL_bit.ACB	= 15;	
LCD_POL_bit.PCD_LO = 2;	
// init Horizontal Timing
LCD_TIMH_bit.HBP = 1;//10;//0x7f;//C_GLCD_H_BACK_PORCH - 1;
LCD_TIMH_bit.HFP = 1;//10;//0x7f;//C_GLCD_H_FRONT_PORCH - 1;
LCD_TIMH_bit.HSW = 2;//2;//30;//C_GLCD_H_PULSE - 1;
LCD_TIMH_bit.PPL = (320/16) - 1;
// init Vertical Timing
LCD_TIMV_bit.VBP = 1;//C_GLCD_V_BACK_PORCH;
LCD_TIMV_bit.VFP = 1;//C_GLCD_V_FRONT_PORCH;
LCD_TIMV_bit.VSW = 2;//2;//C_GLCD_V_PULSE;
LCD_TIMV_bit.LPP = 240 - 1;
// Frame Base Address doubleword aligned
//LCD_UPBASE = (unsigned int)SDRAM_BASE_ADDR; 
LCD_UPBASE = LCD_MEMORY_BASE_ADDR;

LCDMemory = (unsigned char*)LCD_MEMORY_BASE_ADDR;	
memset(LCDMemory, 0, 9600);
//	unsigned int* pDisplayMemory = (unsigned int*)LCDMemory;
unsigned char* pDisplayMemory = LCDMemory;
//	*pDisplayMemory = 0x80000000;
for (unsigned int i = 0; i < 4800; i++)
{
	*pDisplayMemory++ = 0xf0;
}
for (unsigned int i = 0; i < 4800; i++)
{
	*pDisplayMemory++ = 0x0f;
}
}

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