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usercod

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  1. Уже взял пример от MSP430, но хотелось бы видеть оригинал описания, если он вообще существует.
  2. Добрый день, Подскажите где можно достать описание функций интерфейса между SD card и FatFs? Интересует вот эти функции: disk_status - Get device status disk_initialize - Initialize device disk_read - Read sector(s) disk_write - Write sector(s) disk_ioctl - Control device dependent features get_fattime - Get current time Может у кого-нибудь уже есть готовый порт под C5000? Спасибо.
  3. Если уж до конца заморочиться, то стоит рассмотреть Raspberry Pi vs BeagleBoneBlack. В Raspberry Pi мне нравится стандартный HDMI, 3.5mm audio in/out, видеопроцессор поддерживающий 1080р и просто огромное количесто учебных материалов и горовых проектов. BeagleBoneBlack - проц новее (1GHz TI Sitara AM3359), расширяемость доп. платами. Что думаете?
  4. sysel, классный совет, спасибо! Присмотрелся к BeagleBone - крутая штука и стоит не дорого)
  5. Только как платформа для встраиваемых приложений. Стоит уточнить, практически все современные embedded systems истользуют операционки и знание Linux становится необходимым требованием к кандидатам на получения работы. Можно ли рассматривать Android в таком же ключе?
  6. ахаха законно :rolleyes: Ну а так, в принципе, стоит ли рассматривать Android, как что-то, что стоит изучать?
  7. Добрый день, друзья! Помогите пожалуйста определится с выбором борда для изучения Linux. Каждый вариант имеет ряд интересных для меня особенностей, так что хотелось бы узнать ваше мнение. Оба борда поддерживают Linux и имеют примерно одинаковую периферию. Отличительные особенности: 1. OMAP-L138(TMDSLCKDK138) - DSP(TMS320C674)+ARM9(ARM926) Тут меня привлекает двухядерность и само ядро С67. Я в основном пишу на С5000 и хотелось бы попробовать С67 в деле. 2. AM335x(TMDSSK3358) - Android - LCD Здесь можно еще бесплатно и Android изучать. Что думаете?
  8. Все работает, спасибо. Просто я думал, что должно быть немного сложнее.
  9. Xenia, все работает, спасибо. Было выведено через формулы приведения?
  10. Добрый день! Есть синусоидальный сигнал известной частоты, нужно определить его амплитудное значение по трем отчетам отстоящих друг от друга на 120 градусов. Начальная фаза сигнала не известна. Тактирующий и исследуемый сигнал когерентны. По друм отчетам через 90 градусов, все понятно. Тут работатет c^2 =a^2+b^2. В данном случае погрешность определения амп. будет большая при малых значениях сдвига фаз. По трем отчетам через 120 градусов можно существенно снизить погрешность. Задача: как посчитать амплитудное значение сигнала по трем отчетам через 120 град?
  11. Я в принципе в этой секции адреса и смотрел, так что тут проблем нет. Для примера привожу cmd и map файл из библиотеки v.127 где все работает нормально. CMD /*=============================================================================== ===*/ /* User specific Linker command file for running from FLASH */ /*=============================================================================== ===*/ /* FILE: F28027_FLASH_FlashingLeds.CMD */ /* */ /* Description: Linker command file for User custom sections targetted to run */ /* from FLASH. */ /* */ /* Target: TMS320F28027 */ /* */ /* Version: 1.1 */ /* */ /*----------------------------------------------------------------------------------*/ /* Copyright Texas Instruments © 2009 */ /*----------------------------------------------------------------------------------*/ /* Revision History: */ /*----------------------------------------------------------------------------------*/ /* Date | Description */ /*----------------------------------------------------------------------------------*/ /* 04/24/09 | Release 1.1 */ /*----------------------------------------------------------------------------------*/ /* Define the memory block start/length for the F28022 PAGE 0 will be used to organize program sections PAGE 1 will be used to organize data sections Notes: Memory blocks on F2802x are uniform (ie same physical memory) in both PAGE 0 and PAGE 1. That is the same memory region should not be defined for both PAGE 0 and PAGE 1. Doing so will result in corruption of program and/or data. The L0 memory block is mirrored - that is it can be accessed in high memory or low memory. For simplicity only one instance is used in this linker file. Contiguous SARAM memory blocks or flash sectors can be be combined if required to create a larger memory block. */ MEMORY { PAGE 0: /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */ progRAM : origin = 0x008000, length = 0x000800 OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */ FLASHD : origin = 0x3F0000, length = 0x002000 /* on-chip FLASH */ FLASHC : origin = 0x3F2000, length = 0x002000 /* on-chip FLASH */ FLASHA : origin = 0x3F6000, length = 0x001F80 /* on-chip FLASH */ CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */ CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Table in Boot */ IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Table in Boot */ IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Table in Boot */ BOOTROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ RAMM0 : origin = 0x000050, length = 0x0003B0 RAMM1 : origin = 0x000400, length = 0x000400 dataRAM : origin = 0x008800, length = 0x000800 FLASHB : origin = 0x3F4000, length = 0x002000 } SECTIONS { /* Allocate program areas: */ .cinit : > FLASHA, PAGE = 0 .pinit : > FLASHA, PAGE = 0 .text : > FLASHA, PAGE = 0 codestart : > BEGIN PAGE = 0 ramfuncs : LOAD = FLASHA, RUN = progRAM, LOAD_START(_RamfuncsLoadStart), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), PAGE = 0 csmpasswds : > CSM_PWL PAGE = 0 csm_rsvd : > CSM_RSVD PAGE = 0 /* Allocate uninitalized data sections: */ .stack : > RAMM0, PAGE = 1 .ebss : > dataRAM, PAGE = 1 .esysmem : > dataRAM, PAGE = 1 /* Initalized sections go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : > FLASHA PAGE = 0 .switch : > FLASHA PAGE = 0 /* Allocate IQ math areas: */ IQmath : > FLASHA PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES PAGE = 0, TYPE = NOLOAD /* Math Tables In ROM */ /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNexpTable.obj> (IQmathTablesRam) } */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD { IQmath.lib<IQNasinTable.obj> (IQmathTablesRam) } */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS PAGE = 0, TYPE = DSECT } SECTIONS { Net_terminals: > dataRAM,PAGE = 1 } MAP *********************************************************************** ******* TMS320C2000 Linker PC v6.1.0 ****************************************************************************** >> Linked Wed Mar 13 16:57:36 2013 OUTPUT FILE NAME: <FlashingLeds.out> ENTRY POINT SYMBOL: "_c_int00" address: 003f617b MEMORY CONFIGURATION name origin length used unused attr fill ---------------------- -------- --------- -------- -------- ---- -------- PAGE 0: BOOT_RSVD 00000000 00000050 00000000 00000050 RWIX progRAM 00008000 00000800 0000001b 000007e5 RWIX OTP 003d7800 00000400 00000000 00000400 RWIX FLASHD 003f0000 00002000 00000000 00002000 RWIX FLASHC 003f2000 00002000 00000000 00002000 RWIX FLASHA 003f6000 00001f80 000002db 00001ca5 RWIX CSM_RSVD 003f7f80 00000076 00000000 00000076 RWIX BEGIN 003f7ff6 00000002 00000002 00000000 RWIX CSM_PWL 003f7ff8 00000008 00000000 00000008 RWIX IQTABLES 003fe000 00000b50 00000b50 00000000 RWIX IQTABLES2 003feb50 0000008c 00000000 0000008c RWIX IQTABLES3 003febdc 000000aa 00000000 000000aa RWIX BOOTROM 003ff27c 00000d44 00000000 00000d44 RWIX RESET 003fffc0 00000002 00000000 00000002 RWIX VECTORS 003fffc2 0000003e 00000000 0000003e RWIX PAGE 1: RAMM0 00000050 000003b0 00000300 000000b0 RWIX RAMM1 00000400 00000400 00000000 00000400 RWIX DEV_EMU 00000880 00000105 00000004 00000101 RWIX SYS_PWR_CTL 00000985 00000003 00000003 00000000 RWIX FLASH_REGS 00000a80 00000060 00000008 00000058 RWIX CSM 00000ae0 00000010 00000010 00000000 RWIX ADC_RESULT 00000b00 00000020 00000020 00000000 RWIX CPU_TIMER0 00000c00 00000008 00000008 00000000 RWIX CPU_TIMER1 00000c08 00000008 00000008 00000000 RWIX CPU_TIMER2 00000c10 00000008 00000008 00000000 RWIX PIE_CTRL 00000ce0 00000020 0000001a 00000006 RWIX PIE_VECT 00000d00 00000100 00000100 00000000 RWIX COMP1 00006400 00000020 00000011 0000000f RWIX COMP2 00006420 00000020 00000011 0000000f RWIX EPWM1 00006800 00000040 0000003a 00000006 RWIX EPWM2 00006840 00000040 0000003a 00000006 RWIX EPWM3 00006880 00000040 0000003a 00000006 RWIX EPWM4 000068c0 00000040 0000003a 00000006 RWIX ECAP1 00006a00 00000020 00000020 00000000 RWIX GPIOCTRL 00006f80 00000040 00000040 00000000 RWIX GPIODAT 00006fc0 00000020 00000020 00000000 RWIX GPIOINT 00006fe0 00000020 0000000a 00000016 RWIX SYSTEM 00007010 00000020 0000001f 00000001 RWIX SPIA 00007040 00000010 00000010 00000000 RWIX SCIA 00007050 00000010 00000010 00000000 RWIX NMIINTRUPT 00007060 00000010 00000010 00000000 RWIX XINTRUPT 00007070 00000010 00000010 00000000 RWIX ADC 00007100 00000080 00000050 00000030 RWIX I2CA 00007900 00000040 00000022 0000001e RWIX dataRAM 00008800 00000800 0000000e 000007f2 RWIX PARTID 003d7fff 00000001 00000001 00000000 RWIX FLASHB 003f4000 00002000 00000000 00002000 RWIX CSM_PWL 003f7ff8 00000008 00000008 00000000 RWIX SECTION ALLOCATION MAP output attributes/ section page origin length input sections -------- ---- ---------- ---------- ---------------- .pinit 0 003f6000 00000000 UNINITIALIZED .text 0 003f6000 0000023b 003f6000 0000017b DevInit_F2802x.obj (.text) 003f617b 00000044 rts2800_ml.lib : boot.obj (.text) 003f61bf 0000002f Main.obj (.text) 003f61ee 00000019 rts2800_ml.lib : args_main.obj (.text) 003f6207 00000019 : exit.obj (.text) 003f6220 00000009 : _lock.obj (.text) 003f6229 00000008 DSP2802x_CodeStartBranch.obj (.text) 003f6231 00000005 DevInit_F2802x.obj (.text:retain) 003f6236 00000005 I2C_interrupt.obj (.text:retain) ramfuncs 0 003f623b 0000001b RUN ADDR = 00008000 003f623b 0000001b DevInit_F2802x.obj (ramfuncs) IQmath 0 003f6256 00000060 003f6256 00000060 IQmath.lib : IQ24mag.obj (IQmath) .cinit 0 003f62b6 00000025 003f62b6 0000000f Main.obj (.cinit) 003f62c5 0000000a rts2800_ml.lib : _lock.obj (.cinit) 003f62cf 0000000a : exit.obj (.cinit) 003f62d9 00000002 --HOLE-- [fill = 0] codestart * 0 003f7ff6 00000002 003f7ff6 00000002 DSP2802x_CodeStartBranch.obj (codestart) IQmathTables * 0 003fe000 00000b50 NOLOAD SECTION 003fe000 00000b50 IQmath.lib : IQmathTables.obj (IQmathTables) .reset 0 003fffc0 00000002 DSECT 003fffc0 00000002 rts2800_ml.lib : boot.obj (.reset) vectors 0 003fffc2 00000000 DSECT .stack 1 00000050 00000300 UNINITIALIZED 00000050 00000300 --HOLE-- DevEmuRegsFile * 1 00000880 00000004 UNINITIALIZED 00000880 00000004 DSP2802x_GlobalVariableDefs.obj (DevEmuRegsFile) SysPwrCtrlRegsFile * 1 00000985 00000003 UNINITIALIZED 00000985 00000003 DSP2802x_GlobalVariableDefs.obj (SysPwrCtrlRegsFile) FlashRegsFile * 1 00000a80 00000008 UNINITIALIZED 00000a80 00000008 DSP2802x_GlobalVariableDefs.obj (FlashRegsFile) CsmRegsFile * 1 00000ae0 00000010 UNINITIALIZED 00000ae0 00000010 DSP2802x_GlobalVariableDefs.obj (CsmRegsFile) AdcResultFile * 1 00000b00 00000020 UNINITIALIZED 00000b00 00000020 DSP2802x_GlobalVariableDefs.obj (AdcResultFile) CpuTimer0RegsFile * 1 00000c00 00000008 UNINITIALIZED 00000c00 00000008 DSP2802x_GlobalVariableDefs.obj (CpuTimer0RegsFile) CpuTimer1RegsFile * 1 00000c08 00000008 UNINITIALIZED 00000c08 00000008 DSP2802x_GlobalVariableDefs.obj (CpuTimer1RegsFile) CpuTimer2RegsFile * 1 00000c10 00000008 UNINITIALIZED 00000c10 00000008 DSP2802x_GlobalVariableDefs.obj (CpuTimer2RegsFile) PieCtrlRegsFile * 1 00000ce0 0000001a UNINITIALIZED 00000ce0 0000001a DSP2802x_GlobalVariableDefs.obj (PieCtrlRegsFile) PieVectTableFile * 1 00000d00 00000100 UNINITIALIZED 00000d00 00000100 DSP2802x_GlobalVariableDefs.obj (PieVectTableFile) EmuKeyVar * 1 00000d00 00000001 UNINITIALIZED 00000d00 00000001 DSP2802x_GlobalVariableDefs.obj (EmuKeyVar) EmuBModeVar * 1 00000d01 00000001 UNINITIALIZED 00000d01 00000001 DSP2802x_GlobalVariableDefs.obj (EmuBModeVar) FlashCallbackVar * 1 00000d02 00000002 UNINITIALIZED 00000d02 00000002 DSP2802x_GlobalVariableDefs.obj (FlashCallbackVar) FlashScalingVar * 1 00000d04 00000002 UNINITIALIZED 00000d04 00000002 DSP2802x_GlobalVariableDefs.obj (FlashScalingVar) Comp1RegsFile * 1 00006400 00000011 UNINITIALIZED 00006400 00000011 DSP2802x_GlobalVariableDefs.obj (Comp1RegsFile) Comp2RegsFile * 1 00006420 00000011 UNINITIALIZED 00006420 00000011 DSP2802x_GlobalVariableDefs.obj (Comp2RegsFile) EPwm1RegsFile * 1 00006800 0000003a UNINITIALIZED 00006800 0000003a DSP2802x_GlobalVariableDefs.obj (EPwm1RegsFile) EPwm2RegsFile * 1 00006840 0000003a UNINITIALIZED 00006840 0000003a DSP2802x_GlobalVariableDefs.obj (EPwm2RegsFile) EPwm3RegsFile * 1 00006880 0000003a UNINITIALIZED 00006880 0000003a DSP2802x_GlobalVariableDefs.obj (EPwm3RegsFile) EPwm4RegsFile * 1 000068c0 0000003a UNINITIALIZED 000068c0 0000003a DSP2802x_GlobalVariableDefs.obj (EPwm4RegsFile) ECap1RegsFile * 1 00006a00 00000020 UNINITIALIZED 00006a00 00000020 DSP2802x_GlobalVariableDefs.obj (ECap1RegsFile) GpioCtrlRegsFile * 1 00006f80 00000040 UNINITIALIZED 00006f80 00000040 DSP2802x_GlobalVariableDefs.obj (GpioCtrlRegsFile) GpioDataRegsFile * 1 00006fc0 00000020 UNINITIALIZED 00006fc0 00000020 DSP2802x_GlobalVariableDefs.obj (GpioDataRegsFile) GpioIntRegsFile * 1 00006fe0 0000000a UNINITIALIZED 00006fe0 0000000a DSP2802x_GlobalVariableDefs.obj (GpioIntRegsFile) SysCtrlRegsFile * 1 00007010 0000001f UNINITIALIZED 00007010 0000001f DSP2802x_GlobalVariableDefs.obj (SysCtrlRegsFile) SpiaRegsFile * 1 00007040 00000010 UNINITIALIZED 00007040 00000010 DSP2802x_GlobalVariableDefs.obj (SpiaRegsFile) SciaRegsFile * 1 00007050 00000010 UNINITIALIZED 00007050 00000010 DSP2802x_GlobalVariableDefs.obj (SciaRegsFile) NmiIntruptRegsFile * 1 00007060 00000010 UNINITIALIZED 00007060 00000010 DSP2802x_GlobalVariableDefs.obj (NmiIntruptRegsFile) XIntruptRegsFile * 1 00007070 00000010 UNINITIALIZED 00007070 00000010 DSP2802x_GlobalVariableDefs.obj (XIntruptRegsFile) AdcRegsFile * 1 00007100 00000050 UNINITIALIZED 00007100 00000050 DSP2802x_GlobalVariableDefs.obj (AdcRegsFile) I2caRegsFile * 1 00007900 00000022 UNINITIALIZED 00007900 00000022 DSP2802x_GlobalVariableDefs.obj (I2caRegsFile) .ebss 1 00008800 0000000e UNINITIALIZED 00008800 00000006 Main.obj (.ebss) 00008806 00000004 rts2800_ml.lib : _lock.obj (.ebss) 0000880a 00000004 : exit.obj (.ebss) PartIdRegsFile * 1 003d7fff 00000001 UNINITIALIZED 003d7fff 00000001 DSP2802x_GlobalVariableDefs.obj (PartIdRegsFile) CsmPwlFile * 1 003f7ff8 00000008 UNINITIALIZED 003f7ff8 00000008 DSP2802x_GlobalVariableDefs.obj (CsmPwlFile) GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name address name -------- ---- 003f6000 .text 003f6207 C$$EXIT 00007100 _AdcRegs 00000b00 _AdcResult 00006400 _Comp1Regs 00006420 _Comp2Regs 00000c00 _CpuTimer0Regs 00000c08 _CpuTimer1Regs 00000c10 _CpuTimer2Regs 003f7ff8 _CsmPwl 00000ae0 _CsmRegs 00000880 _DevEmuRegs 003f6000 _DeviceInit 00006a00 _ECap1Regs 00006800 _EPwm1Regs 00006840 _EPwm2Regs 00006880 _EPwm3Regs 000068c0 _EPwm4Regs 00000d01 _EmuBMode 00000d00 _EmuKey 00000a80 _FlashRegs 00000d04 _Flash_CPUScaleFactor 00000d02 _Flash_CallbackPtr 00006f80 _GpioCtrlRegs 00006fc0 _GpioDataRegs 00006fe0 _GpioIntRegs 003f611b _I2CA_Init 00007900 _I2caRegs 003fead8 _IQ10mpyRndSatTable 003feacc _IQ11mpyRndSatTable 003feac0 _IQ12mpyRndSatTable 003feab4 _IQ13mpyRndSatTable 003feaa8 _IQ14mpyRndSatTable 003fea9c _IQ15mpyRndSatTable 003fea90 _IQ16mpyRndSatTable 003fea84 _IQ17mpyRndSatTable 003fea78 _IQ18mpyRndSatTable 003fea6c _IQ19mpyRndSatTable 003feb44 _IQ1mpyRndSatTable 003fea60 _IQ20mpyRndSatTable 003fea54 _IQ21mpyRndSatTable 003fea48 _IQ22mpyRndSatTable 003fea3c _IQ23mpyRndSatTable 003fea30 _IQ24mpyRndSatTable 003fea24 _IQ25mpyRndSatTable 003fea18 _IQ26mpyRndSatTable 003fea0c _IQ27mpyRndSatTable 003fea00 _IQ28mpyRndSatTable 003fe9f4 _IQ29mpyRndSatTable 003feb38 _IQ2mpyRndSatTable 003fe9e8 _IQ30mpyRndSatTable 003feb2c _IQ3mpyRndSatTable 003feb20 _IQ4mpyRndSatTable 003feb14 _IQ5mpyRndSatTable 003feb08 _IQ6mpyRndSatTable 003feafc _IQ7mpyRndSatTable 003feaf0 _IQ8mpyRndSatTable 003feae4 _IQ9mpyRndSatTable 003fe824 _IQatan2HalfPITable 003fe862 _IQatan2Table 003fe9e8 _IQatan2TableEnd 003fe100 _IQcosTable 003fe502 _IQcosTableEnd 003fe502 _IQdivRoundSatTable 003fe510 _IQdivTable 003fe712 _IQdivTableEnd 003fe712 _IQisqrtRoundSatTable 003fe722 _IQisqrtTable 003fe824 _IQisqrtTableEnd 003fe9e8 _IQmpyRndSatTable 003feb50 _IQmpyRndSatTableEnd 003fe000 _IQsinTable 003fe400 _IQsinTableEnd 003fe712 _IQsqrtRoundSatTable 003fe722 _IQsqrtTable 003fe824 _IQsqrtTableEnd 003f6231 _ISR_ILLEGAL 00008000 _InitFlash 003f6166 _MemCopy 00007060 _NmiIntruptRegs 003f60e5 _PLLset 003d7fff _PartIdRegs 003f6128 _PieCntlInit 00000ce0 _PieCtrlRegs 00000d00 _PieVectTable 003f6147 _PieVectTableInit 003f6256 _RamfuncsLoadEnd 003f623b _RamfuncsLoadStart 00008000 _RamfuncsRunStart 00007050 _SciaRegs 00007040 _SpiaRegs 00007010 _SysCtrlRegs 00000985 _SysPwrCtrlRegs 003f60dd _WDogDisable 00007070 _XIntruptRegs 003f6256 __IQ24mag 00000350 __STACK_END 00000300 __STACK_SIZE 00000001 __TI_args_main ffffffff ___binit__ ffffffff ___c_args__ 003f62b6 ___cinit__ 003f623b ___etext__ ffffffff ___pinit__ 003f6000 ___text__ 003f61ee __args_main 0000880a __cleanup_ptr 0000880c __dtors_ptr 00008808 __lock 003f6228 __nop 003f6224 __register_lock 003f6220 __register_unlock 00000050 __stack 00008806 __unlock 00008802 _a 003f6207 _abort 00008800 _b 00008804 _c 003f617b _c_int00 003f6209 _exit 003f6236 _i2c_int1a_isr 003f61bf _main ffffffff binit 003f62b6 cinit 003f7ff6 code_start 003f623b etext ffffffff pinit GLOBAL SYMBOLS: SORTED BY Symbol Address address name -------- ---- 00000001 __TI_args_main 00000050 __stack 00000300 __STACK_SIZE 00000350 __STACK_END 00000880 _DevEmuRegs 00000985 _SysPwrCtrlRegs 00000a80 _FlashRegs 00000ae0 _CsmRegs 00000b00 _AdcResult 00000c00 _CpuTimer0Regs 00000c08 _CpuTimer1Regs 00000c10 _CpuTimer2Regs 00000ce0 _PieCtrlRegs 00000d00 _EmuKey 00000d00 _PieVectTable 00000d01 _EmuBMode 00000d02 _Flash_CallbackPtr 00000d04 _Flash_CPUScaleFactor 00006400 _Comp1Regs 00006420 _Comp2Regs 00006800 _EPwm1Regs 00006840 _EPwm2Regs 00006880 _EPwm3Regs 000068c0 _EPwm4Regs 00006a00 _ECap1Regs 00006f80 _GpioCtrlRegs 00006fc0 _GpioDataRegs 00006fe0 _GpioIntRegs 00007010 _SysCtrlRegs 00007040 _SpiaRegs 00007050 _SciaRegs 00007060 _NmiIntruptRegs 00007070 _XIntruptRegs 00007100 _AdcRegs 00007900 _I2caRegs 00008000 _InitFlash 00008000 _RamfuncsRunStart 00008800 _b 00008802 _a 00008804 _c 00008806 __unlock 00008808 __lock 0000880a __cleanup_ptr 0000880c __dtors_ptr 003d7fff _PartIdRegs 003f6000 .text 003f6000 _DeviceInit 003f6000 ___text__ 003f60dd _WDogDisable 003f60e5 _PLLset 003f611b _I2CA_Init 003f6128 _PieCntlInit 003f6147 _PieVectTableInit 003f6166 _MemCopy 003f617b _c_int00 003f61bf _main 003f61ee __args_main 003f6207 C$$EXIT 003f6207 _abort 003f6209 _exit 003f6220 __register_unlock 003f6224 __register_lock 003f6228 __nop 003f6231 _ISR_ILLEGAL 003f6236 _i2c_int1a_isr 003f623b _RamfuncsLoadStart 003f623b ___etext__ 003f623b etext 003f6256 _RamfuncsLoadEnd 003f6256 __IQ24mag 003f62b6 ___cinit__ 003f62b6 cinit 003f7ff6 code_start 003f7ff8 _CsmPwl 003fe000 _IQsinTable 003fe100 _IQcosTable 003fe400 _IQsinTableEnd 003fe502 _IQcosTableEnd 003fe502 _IQdivRoundSatTable 003fe510 _IQdivTable 003fe712 _IQdivTableEnd 003fe712 _IQisqrtRoundSatTable 003fe712 _IQsqrtRoundSatTable 003fe722 _IQisqrtTable 003fe722 _IQsqrtTable 003fe824 _IQatan2HalfPITable 003fe824 _IQisqrtTableEnd 003fe824 _IQsqrtTableEnd 003fe862 _IQatan2Table 003fe9e8 _IQ30mpyRndSatTable 003fe9e8 _IQatan2TableEnd 003fe9e8 _IQmpyRndSatTable 003fe9f4 _IQ29mpyRndSatTable 003fea00 _IQ28mpyRndSatTable 003fea0c _IQ27mpyRndSatTable 003fea18 _IQ26mpyRndSatTable 003fea24 _IQ25mpyRndSatTable 003fea30 _IQ24mpyRndSatTable 003fea3c _IQ23mpyRndSatTable 003fea48 _IQ22mpyRndSatTable 003fea54 _IQ21mpyRndSatTable 003fea60 _IQ20mpyRndSatTable 003fea6c _IQ19mpyRndSatTable 003fea78 _IQ18mpyRndSatTable 003fea84 _IQ17mpyRndSatTable 003fea90 _IQ16mpyRndSatTable 003fea9c _IQ15mpyRndSatTable 003feaa8 _IQ14mpyRndSatTable 003feab4 _IQ13mpyRndSatTable 003feac0 _IQ12mpyRndSatTable 003feacc _IQ11mpyRndSatTable 003fead8 _IQ10mpyRndSatTable 003feae4 _IQ9mpyRndSatTable 003feaf0 _IQ8mpyRndSatTable 003feafc _IQ7mpyRndSatTable 003feb08 _IQ6mpyRndSatTable 003feb14 _IQ5mpyRndSatTable 003feb20 _IQ4mpyRndSatTable 003feb2c _IQ3mpyRndSatTable 003feb38 _IQ2mpyRndSatTable 003feb44 _IQ1mpyRndSatTable 003feb50 _IQmpyRndSatTableEnd ffffffff ___binit__ ffffffff ___c_args__ ffffffff ___pinit__ ffffffff binit ffffffff pinit [127 symbols]