Problems Fixed in PADS2007 Update 2
PADS2007 Update 2 contains all fixes included in Update1, and one
additional fix for PADS
New Fix in Update 2
.. DR 399563 - Pin Sequence is reset to default 1-??, after exporting ASCII
Description: Conversion of PADS2007 Layout Designs to older versions
such as PADS2005 SPac3 and earlier through the ASCII file interface can
cause the unintentional swapping of data on pins including:
Signal Pin nets
Important: ASCII out of and into PADS Layout using the current PADS2007
format does not introduce changes to pin data. The following issues are
ONLY if you have converted your design via ASCII to a version of PADS prior
Most designs will not display errors. The following information is provided
the effects of the issue and also to indicate functionality which is not
Pin Types are used primarily when analyzing PADS Layout designs in the
HyperLynx Boardsim product. Pin Types are used by Layout only under
Routing Length Minimization types Serial Source, Parallel Source and
for high speed nets, and display only if a pin property is viewed. Pin
type errors do not affect design connectivity in PADS Layout. Pin type
information is stored in the library component.
PADS2007 Update 2 Release Notes 3
Pin Names are used primarily in PADS Logic and have no effects in PADS
Layout. Pin name data is stored in the library component.
Swap types are used by ECO routines to allow or inhibit swapping of pins
within a component. Users may be able to manually initiate incorrect pin
swaps in ECO mode between pins which are defined as not swappable in the
library if a component has the error. Pin name data is stored in the
Signal pin nets are used by PADS Layout only during the reading of a
from a schematic capture package such as PADS Logic or DxDesigner to
connect pins having the same nets. ASCII out of a PADS Layout design to an
older version and reading the design back into Layout does not
connect signal pin. Existing net connectivity is not affected by this
Signal pin data is stored in the library component.
Comparison of a Layout design to an ASCII file, a different Layout design,
a schematic using ECO routines is not affected by these errors.
An erroneous part manually saved to a library from a PCB design in PADS
Layout could overwrite an existing part definition. This could lead to
connectivity issues if the part is used to create a schematic.
In most cases users will not experience these errors. This update is being
avoid overwriting correct pin data in library parts if a component is
merged from a PADS
Layout design to a user's library.
Tech Note and Repair Script Download
For more detailed information, including a location from which you can
script that will check for and correct these errors, see
Tech Note mg79023 – PADS Layout pin errors when ASCII out to previous
4 PADS2007 Update 2 Release Notes
Fixed in Update 1
.. DR 392157 - Connectivity check may show non-existent errors on stitching
Description: In some designs with stitching vias non-existant errors
are displayed when running Connectivity checking. Connectivity
checking is not ommiting the display of real connectivity errors but it
may display false errors when none exist.
.. DR 393506 - Step and repeat in decal editor does not accept the "."
which is critical for use of millimeters.
Description: In Decal Editor, adding a pad and using the Repeat RMB
command, the Distance field does not accept "." character to allow
metric use. When typing a metric value you will receive an error
.. DR 392733 - Move verb mode not remaining active when using the SS
to select components to move.
Description: The Move verb mode no longer stays active after the SS
(Search and Select) modeless command is used to find and select a
.. DR 391380 - Reports Netlist w/o pin information, Netlist w/pin
PowerPCB V3.0 Format Netlist or PowerPCB V2.0 increment pin
numbers by one.
Description: The output for these reports are incrementing pin
numbers for each component by one. Netlist output and ASCII ouput
are not affected.
.. DR 390744 - Padstacks require a "." character before or after a decimal
Description: When editing Padstacks in PADS2005 entries such as
.33 or .21 are allowed but PADS2007 requires entries such as 0.33
PADS2007 Update 2 Release Notes 5
.. DR 399093 - CAM Drill Drawing setup nulls drill count for NP drills, and
Description: The Drill table listing in CAM may not display and sort the
contents correctly after an existing symbol has been changed to a
.. DR 395845 - Program crashes for any nets with 40 or more characters
the View List in Assign > Nets
Description: In some instances modification or viewing of nets with 40
or more characters in the View > Nets dialog may cause Layout to fail.
.. DR 395016 - Forward Annotation from Dx to PADS is overwriting default
rules in the PCB database
Description: Component rules comparisons between DxDesigner and
PADS Layout or PADS Logic and PADS Layout may cause an
existing Layout component rules value to be set to zero if the value is
set in Layout and the value is not set in eith the DxDesigner or Logic
.. DR 394712 - Creation of CAM350 files may cause Layout to fail.
Description: In some instances use of the CAM350 Link may cause
Layout to fail
.. DR 397887 - Fatal error with complex copper
Description: In some instances manipulation and CAM output of
complex copper may cause the Layout to fail.
.. DR 393829 - In case of multiple via styles, the interactive router use
via size, regardless of the selected via type.
Description: Interactive routing in PADS Router is always selecting the
smallest via to be placed. This error requires the user to either restrict
certain via types prior to routing or they must re-select placed vias and
change them to a larger size manually.
.. DR 388691 - The default rule setting for "Maximum number of Vias" is set
in PADS Logic for all new schematics started in PADS2007.
6 PADS2007 Update 2 Release Notes
Description: When creating a new Logic schematic the maximum
number of vias allowed in rules is set to zero which when translated to
Router inhibits routing. The user must manually change the rules in
the design to a value larger than zero to allow Routing in PADS
.. DR 399630 - Fatal run-time error, while exporting ASCII in Logic
Description: In some cases a design with many rules in PADS Logic
will fail during rules manipulation or ASCII out.
.. DR 398734 - Printing on pdf printer (with Adobe Professional 7.0) the
result is not
scaled 1 to 1, but is reduced to half of the page.
Description: PDF out using an Adobe printer driver and regular
printing output to a laser printer may not scale to the full extents of the
allowable plotting area. Logic interprets the plotting area to be smaller
than the available space. The higher the resolution of the output
device the greater the plotting area will be reduced. Printing using the
Scale to Fit command will generate ouput smaller than the available