Expedition PCB - Pinnacle Version: EXP2005.3_070529.00 2005.3

PLOW REPORT
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19:10:42 Saturday, July 26, 2008

Host Layout Design: F:\MentorGraphics\Arzamas\pcb\pcb.pcb


Plow Failed due to the following violations not resolved:


Violation Pair 1
PUSHER: Via: 1-4-layer 'VIA' @ (15.9,8.9) Net: GND
PUSHEE: 5-point Path: (18.6,6.1)-(15.8,8.5) @ Layer: 1 Net: $1N9

Violation Pair 2
PUSHER: Via: 1-4-layer 'VIA' @ (15.9,8.9) Net: GND
PUSHEE: Pin: 4-4-layer 'rec 0.5x0.7' C22/2 @ (15.3,9.4) Net: OUT

Violation Pair 3
PUSHER: Via: 1-4-layer 'VIA' @ (15.9,8.9) Net: GND
PUSHEE: Pin: 1-1-layer 'rec 0.8x0.45' U3/1 @ (15.8,8.5) Net: $1N9

Violation Pair 4
PUSHER: Via: 1-4-layer 'VIA' @ (15.9,8.9) Net: GND
PUSHEE: Pin: 4-4-layer 'rec 0.5x0.7' R15/1 @ (16.8,8.6) Net: $1N238

Violation Pair 5
PUSHER: Via: 1-4-layer 'VIA' @ (15.9,8.9) Net: GND
PUSHEE: Via: 1-4-layer 'VIA' @ (16.5,9.7) Net: GND

Violation Pair 6
PUSHER: Via: 1-4-layer 'VIA' @ (15.9,8.9) Net: GND
PUSHEE: 2-point Path: (16.5,9.7)-(16.5,8.5) @ Layer: 1 Net: GND

Violation Pair 7
PUSHER: Via: 1-4-layer 'VIA' @ (15.9,8.9) Net: GND
PUSHEE: Pin: 4-4-layer 'rec 0.5x0.7' C22/1 @ (15.3,8.4) Net: GND

Violation Pair 8
PUSHER: Via: 1-4-layer 'VIA' @ (15.9,8.9) Net: GND
PUSHEE: Pin: 1-1-layer 'rec 0.8x0.45' U3/2 @ (16.5,8.5) Net: GND

