
                               Forward Annotation
                               ------------------

                         12:47 PM Sunday, July 27, 2008
                 Job Name: F:\MentorGraphics\Arzamas\pcb\pcb.pcb


Version:  01.01.00

     The PDBs listed in the project file will be searched to satisfy the parts
      requirements of the CDB only for parts not already found in the
      Target PDB.

     The schematic source is a DxDesigner Common Data Base.

     The AllowAlphaRefDes status indicates that reference
      designators containing all alpha characters should be deleted
      and the relevant symbols repackaged.

     The FLATNETNAMEs status indicates that the present set
      of schematic netnames should be used to update the
      FLATNETNAMEs.

     WARNING:  The schematic source files have been modified since
      the present Common DataBase was compiled.  Please have the
      schematic designer recompile the CDB and rerun this procedure
      if it is desired to incorporate the latest changes.

     Common Data Base has been read

     Target PDB Name: Work\Layout_Temp\PartsDB.pdb

     Number of Part Numbers: 12
          Part Numb: ADG819BRM -> Vend Part: ADG819BRM 
          Part Numb: ADP3335ARM -> Vend Part: ADP3335ARM 
          Part Numb: ADR03AKS -> Vend Part: ADR03AKS 
          Part Numb: AD822ARM -> Vend Part: AD822ARM 
          Part Numb: AD8605ART -> Vend Part: AD8605ART 
          Part Numb: ARK_SIMPLE -> Vend Part: ARK_SIMPLE 
          Part Numb: C-TANTAL_CASE_A -> Vend Part: C-TANTAL_CASE_A 
          Part Numb: C-0402 -> Vend Part: C-0402 
          Part Numb: LTC1799CS5 -> Vend Part: LTC1799CS5 
          Part Numb: R-VAR-22AR5KLFTR -> Vend Part: R-VAR-22AR5KLFTR 
          Part Numb: R-0402 -> Vend Part: R-0402 
          Part Numb: TP -> Vend Part: TP 

     Number of Part Names: 0

     Number of Part Labels: 0


     Checking for value differences between symbol properties and PartsDB properties

     Checking the validity of the packaging of prepackaged schematic
      symbols.  Only the first error in symbols having the same
      Reference Designator will be reported.

     The packaging of all prepackaged schematic symbols is consistent
      with the Parts DataBase data for the cross mapping of
      symbol pin names to Part Number pin numbers.
      Symbols that were not prepackaged will now be packaged correctly.
      
     No errors in Existing Schematic Packaging.

     The Common DataBase has been read and will be packaged.
     Clustering 56 Symbols:
              56  *****
              50  **************************************************
     Clustering is Complete

     Packager Assignments successfully completed



     25 nets were found containing 147 pins
     54 components were found

     After augmentation of supply pins, there are 25 nets where 0 nets have only one pin.

     Creating a formatted Schematic Netlist (LogFiles\SchematicNetlist.txt)...
     A formatted Schematic Netlist has been created.

     The Logic DataBase has been compiled from the Schematic Design.
      Use Netload to bring the Component Design into sync.

     This Logic Data was Compiled with 1 warnings.
      Erroneous results may occur if not fixed.

                                     NetLoad
                                     -------

                         12:47 PM Sunday, July 27, 2008
                 Job Name: F:\MentorGraphics\Arzamas\pcb\pcb.pcb


Version:  02.11.12

     Netloading the Layout.  Unused components will be changed to spares.

     Unconnected pins will be set to net "(Net0)".

     Schematic reference designator changes will be forward annotated.

     Netload completed successfully with 0 warning(s).
     
     Back Annotating...

  Updating Logic Database...

     Version:  99.00.05

     No changes made to Existing Schematic Packaging.


     There is no symbol data to be back annotated to the schematic source.


     The Logic DataBase has been updated and the Common DataBase has
      automatically been brought into sync with the Logic DataBase.
      Please proceed with your design.

     Finished updating the Logic Database.

     Creating a formatted Schematic Netlist (LogFiles\AfterBakAnnoNetlist.txt)...
     A formatted Schematic Netlist has been created.

     Creating a new netlist text file (LogFiles\KeyinNetList.txt)
      from the Logic Database (Work\Layout_Temp\LogicDB.lgc)...
  A new netlist text file has been generated.



                 Beginning Netload on the Layout Design.
           ---------------------------------------------------

Forward-Annotation on the Layout Design has been successfully completed.

There were 0 reassignments of nets.
There were 0 traces broken back.
There were 0 nets removed from the Layout Design.