Вариант с 32хбитными переменными: RSEG CODE:CODE:NOROOT(1) // 6 void queens(unsigned int N) queens: // 7 { ST -Y, R13 ST -Y, R12 ST -Y, R11 ST -Y, R10 ST -Y, R9 ST -Y, R8 ST -Y, R6 ST -Y, R5 ST -Y, R4 ST -Y, R27 ST -Y, R26 ST -Y, R25 ST -Y, R24 REQUIRE ?Register_R4_is_cg_reg REQUIRE ?Register_R5_is_cg_reg REQUIRE ?Register_R6_is_cg_reg REQUIRE ?Register_R8_is_cg_reg REQUIRE ?Register_R9_is_cg_reg REQUIRE ?Register_R10_is_cg_reg REQUIRE ?Register_R11_is_cg_reg REQUIRE ?Register_R12_is_cg_reg REQUIRE ?Register_R13_is_cg_reg SUBI R29, 2 MOVW R13:R12, R17:R16 // 8 unsigned long arow[32], aleft[32], aright[32], aposs[32]; // 9 unsigned long poss, place, val = (1<>(N/2); MOVW R21:R20, R13:R12 LSR R21 ROR R20 MOV R16, R4 MOV R18, R6 MOV R19, R6 CALL ?UL_SHR_L03 MOVW R31:R30, R29:R28 SUBI R30, 124 SBCI R31, 254 ST Z, R16 STD Z+1, R17 STD Z+2, R18 STD Z+3, R19 MOVW R21:R20, R17:R16 MOVW R23:R22, R19:R18 // 14 // 15 while(pos) // 16 { // 17 if(poss) ??queens_0: MOV R16, R20 OR R16, R21 OR R16, R22 OR R16, R23 BRNE $+2+2 RJMP ??queens_1 // 18 { // 19 place = poss & -poss; MOVW R1:R0, R21:R20 MOVW R3:R2, R23:R22 COM R1 COM R2 COM R3 LDI R16, 255 NEG R0 SBC R1, R16 SBC R2, R16 SBC R3, R16 MOVW R17:R16, R21:R20 MOVW R19:R18, R23:R22 AND R16, R0 AND R17, R1 AND R18, R2 AND R19, R3 // 20 poss &= ~place; MOVW R1:R0, R17:R16 MOVW R3:R2, R19:R18 COM R0 COM R1 COM R2 COM R3 AND R20, R0 AND R21, R1 AND R22, R2 AND R23, R3 // 21 if(pos==1 && !poss && (N & 1))count<<=1; CPI R24, 1 BRNE ??queens_2 MOV R0, R20 OR R0, R21 OR R0, R22 OR R0, R23 BRNE ??queens_2 SBRS R12, 0 RJMP ??queens_2 LDI R30, LOW(count) LDI R31, (count) >> 8 LD R0, Z LDD R1, Z+1 LSL R0 ROL R1 ST Z, R0 STD Z+1, R1 // 22 if(pos!=N) ??queens_2: LDI R25, 0 CP R24, R12 CPC R25, R13 BRNE $+2+2 RJMP ??queens_3 // 23 { // 24 aposs[pos]=poss; LDI R30, 4 MUL R24, R30 MOVW R27:R26, R1:R0 MOVW R31:R30, R29:R28 SUBI R30, 128 SBCI R31, 254 ADD R30, R0 ADC R31, R1 ST Z, R20 STD Z+1, R21 STD Z+2, R22 STD Z+3, R23 // 25 poss=arow[pos+1]=arow[pos]|place; MOVW R31:R30, R29:R28 ADD R30, R0 ADC R31, R1 LD R20, Z LDD R21, Z+1 LDD R22, Z+2 LDD R23, Z+3 OR R20, R16 OR R21, R17 OR R22, R18 OR R23, R19 STD Z+4, R20 STD Z+5, R21 STD Z+6, R22 STD Z+7, R23 // 26 poss|=aleft[pos+1]=(aleft[pos]|place)<<1; MOVW R31:R30, R29:R28 SUBI R30, 128 SBCI R31, 255 ADD R30, R0 ADC R31, R1 LD R0, Z LDD R1, Z+1 LDD R2, Z+2 LDD R3, Z+3 OR R0, R16 OR R1, R17 OR R2, R18 OR R3, R19 LSL R0 ROL R1 ROL R2 ROL R3 STD Z+4, R0 STD Z+5, R1 STD Z+6, R2 STD Z+7, R3 // 27 poss|=aright[pos+1]=(aright[pos]|place)>>1; MOVW R31:R30, R29:R28 INC R31 ADD R30, R26 ADC R31, R27 LD R8, Z LDD R9, Z+1 LDD R10, Z+2 LDD R11, Z+3 OR R8, R16 OR R9, R17 OR R10, R18 OR R11, R19 LSR R11 ROR R10 ROR R9 ROR R8 STD Z+4, R8 STD Z+5, R9 STD Z+6, R10 STD Z+7, R11 OR R20, R0 OR R21, R1 OR R22, R2 OR R23, R3 OR R20, R8 OR R21, R9 OR R22, R10 OR R23, R11 // 28 aposs[++pos]=poss=~(poss) & val; INC R24 COM R20 COM R21 COM R22 COM R23 AND R20, R4 AND R21, R5 AND R22, R6 AND R23, R6 MOVW R31:R30, R29:R28 SUBI R30, 128 SBCI R31, 254 LDI R16, 4 MUL R24, R16 ADD R30, R0 ADC R31, R1 ST Z, R20 STD Z+1, R21 STD Z+2, R22 STD Z+3, R23 RJMP ??queens_4 // 29 } // 30 else // 31 { // 32 ++count; ??queens_3: LDI R30, LOW(count) LDI R31, (count) >> 8 LD R16, Z LDD R17, Z+1 SUBI R16, 255 SBCI R17, 255 ST Z, R16 STD Z+1, R17 RJMP ??queens_0 // 33 } // 34 } // 35 else // 36 { // 37 poss=aposs[--pos]; ??queens_1: DEC R24 MOVW R31:R30, R29:R28 SUBI R30, 128 SBCI R31, 254 LDI R16, 4 MUL R24, R16 ADD R30, R0 ADC R31, R1 LD R20, Z LDD R21, Z+1 LDD R22, Z+2 LDD R23, Z+3 // 38 } // 39 } ??queens_4: TST R24 BREQ $+2+2 RJMP ??queens_0 // 40 } SUBI R29, 254 LD R24, Y+ LD R25, Y+ LD R26, Y+ LD R27, Y+ LD R4, Y+ LD R5, Y+ LD R6, Y+ LD R8, Y+ LD R9, Y+ LD R10, Y+ LD R11, Y+ LD R12, Y+ LD R13, Y+ RET Вариантс 16тибитными переменными RSEG CODE:CODE:NOROOT(1) // 6 void queens(unsigned int N) queens: // 7 { ST -Y, R25 ST -Y, R24 DEC R29 MOVW R19:R18, R17:R16 // 8 unsigned short arow[32], aleft[32], aright[32], aposs[32]; // 9 unsigned short poss, place, val = (1<>(N/2); MOVW R21:R20, R19:R18 LSR R21 ROR R20 MOVW R17:R16, R25:R24 CALL ?US_SHR_L02 MOVW R31:R30, R29:R28 SUBI R30, 62 SBCI R31, 255 ST Z, R16 STD Z+1, R17 // 14 // 15 while(pos) // 16 { // 17 if(poss) ??queens_0: MOV R20, R16 OR R20, R17 BRNE $+2+2 RJMP ??queens_1 // 18 { // 19 place = poss & -poss; MOVW R31:R30, R17:R16 NEG R31 NEG R30 SBCI R31, 0 MOVW R21:R20, R17:R16 AND R20, R30 AND R21, R31 // 20 poss &= ~place; MOVW R1:R0, R21:R20 COM R0 COM R1 AND R16, R0 AND R17, R1 // 21 if(pos==1 && !poss && (N & 1))count<<=1; CPI R22, 1 BRNE ??queens_2 MOV R23, R16 OR R23, R17 BRNE ??queens_2 SBRS R18, 0 RJMP ??queens_2 LDI R30, LOW(count) LDI R31, (count) >> 8 LD R0, Z LDD R1, Z+1 LSL R0 ROL R1 ST Z, R0 STD Z+1, R1 // 22 if(pos!=N) ??queens_2: LDI R23, 0 CP R22, R18 CPC R23, R19 BREQ ??queens_3 // 23 { // 24 aposs[pos]=poss; LDI R23, 2 MUL R22, R23 MOVW R31:R30, R29:R28 SUBI R30, 64 SBCI R31, 255 ADD R30, R0 ADC R31, R1 ST Z, R16 STD Z+1, R17 // 25 poss=arow[pos+1]=arow[pos]|place; MOVW R31:R30, R29:R28 ADD R30, R0 ADC R31, R1 LD R16, Z LDD R17, Z+1 OR R16, R20 OR R17, R21 STD Z+2, R16 STD Z+3, R17 // 26 poss|=aleft[pos+1]=(aleft[pos]|place)<<1; MOVW R31:R30, R29:R28 SUBI R30, 192 SBCI R31, 255 ADD R30, R0 ADC R31, R1 LD R2, Z LDD R3, Z+1 OR R2, R20 OR R3, R21 LSL R2 ROL R3 STD Z+2, R2 STD Z+3, R3 // 27 poss|=aright[pos+1]=(aright[pos]|place)>>1; MOVW R31:R30, R29:R28 SUBI R30, 128 SBCI R31, 255 ADD R30, R0 ADC R31, R1 LD R0, Z LDD R1, Z+1 OR R0, R20 OR R1, R21 LSR R1 ROR R0 STD Z+2, R0 STD Z+3, R1 OR R16, R2 OR R17, R3 OR R16, R0 OR R17, R1 // 28 aposs[++pos]=poss=~(poss) & val; INC R22 COM R16 COM R17 AND R16, R24 AND R17, R25 MOVW R31:R30, R29:R28 SUBI R30, 64 SBCI R31, 255 MUL R22, R23 ADD R30, R0 ADC R31, R1 ST Z, R16 STD Z+1, R17 RJMP ??queens_4 // 29 } // 30 else // 31 { // 32 ++count; ??queens_3: LDI R30, LOW(count) LDI R31, (count) >> 8 LD R20, Z LDD R21, Z+1 SUBI R20, 255 SBCI R21, 255 ST Z, R20 STD Z+1, R21 RJMP ??queens_0 // 33 } // 34 } // 35 else // 36 { // 37 poss=aposs[--pos]; ??queens_1: DEC R22 MOVW R31:R30, R29:R28 SUBI R30, 64 SBCI R31, 255 LDI R16, 2 MUL R22, R16 ADD R30, R0 ADC R31, R1 LD R16, Z LDD R17, Z+1 // 38 } // 39 } ??queens_4: TST R22 BREQ $+2+2 RJMP ??queens_0 // 40 } INC R29 LD R24, Y+ LD R25, Y+ RET