Unable to set software breakpoint

el123 0

16 октября, 2010

Опубликовано 16 октября, 2010 · Жалоба

перешел на linux.

Теперь вместо iar для программирования мк at91sam7x использую gcc

Создал тулчейн. Установил эклипс. Установил embeddedCDT.

Все компилится, прошивкается, и даже ходил по строкам кода. Т.е. отладка есть. Видны регистры, видна память.

Но, не работают точки останова.

К примеру ставлю в эклипсе брек поинт, нажимаю F8. И отладчик туда не попадает, он её игнорирует, если нажать на паузу, отладка остановится, у меня к примеру на while(1).

В общем подскажите что за дела?

У меня at91sam7x. Отладчик segger j-link.

Конфиг для openocd:

interface jlink
jtag_khz 32
set CHIPNAME at91sam7x256
source [find target/at91sam7sx.cfg]

#flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 0 4032

arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable

proc read_register {register} {
set result ""
ocd_mem2array result 32 $register 1
return $result(0)
}


# remap. 0 = flash, 1 = ram
proc remap { area } {
set ram_start 0x00200000
set tmp1 [read_register 0]
#alter ram[0] contents
mww $ram_start [ expr [read_register $ram_start] ^ 0xFFFFFFFF]
set tmp2 [read_register 0]
#restore ram[0]
mww $ram_start [ expr [read_register $ram_start] ^ 0xFFFFFFFF]

if [ expr $tmp1 == $tmp2 ] { # remaped contents not altered -> flash remaped
if [ expr $area == 1 ] { # remap required
mww 0xFFFFFF00 0x00000001
}
} else {
if [ expr $area == 0] { # remap required
mww 0xFFFFFF00 0x00000001
}
}
}


$_TARGETNAME configure -event reset-init {
soft_reset_halt
# RSTC_CR : Reset peripherals
jtag_khz 32
mww 0xfffffd00 0xa5000004
# wait until SRCMP set (reset in progress)
while { [expr [read_register 0xfffffd04] & 0x00020000] != 0 } { sleep 1 }

# OSC enable, no timeout
mww 0xFFFFFC20 0x00000001
# wait until MOSCS
while { [expr [read_register 0xfffffC68] & 0x00000001] == 0 } { sleep 1 }

# Assuming 4.032 MHz osc
# *36/3 set LOCK after 6 SCLK
mww 0xFFFFFC2C 0x00230602

# PRES = 2
mww 0xFFFFFC30 0x00000004
#wait untli MCKRDY
while { [expr [read_register 0xfffffC68] & 0x00000008] == 0 } { sleep 1 }

# MCK = PLLCK / 2
mww 0xFFFFFC30 0x00000007
#wait untli MCKRDY
while { [expr [read_register 0xfffffC68] & 0x00000008] == 0 } { sleep 1 }

jtag_khz 8000 #0

# MC_FMR: FWS=1
mww 0xffffff60 0x00000100

remap 0
echo "reset done"
}

Настройки для плагина embeddedCDT:

symbol-file main.out
target remote localhost:3333
monitor reset
monitor sleep 500
monitor poll
monitor soft_reset_halt
monitor arm7_9 dcc_downloads enable
monitor flash probe 0
monitor flash erase_sector 0 0 15
monitor flash write_bank 0 main.bin 0
monitor reset run
monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable
thbreak main
continue

Ход выполнения:

source .gdbinit
symbol-file main.out

target remote localhost:3333

0x00000000 in _vec_reset ()

monitor reset

JTAG tap: at91sam7x256.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)

monitor sleep 500

monitor poll

background polling: on

TAP: at91sam7x256.cpu (enabled)

target state: running

monitor soft_reset_halt

requesting target halt and executing a soft reset

target state: halted

target halted in ARM state due to debug-request, current mode: Supervisor

cpsr: 0x000000d3 pc: 0x00000000

monitor arm7_9 dcc_downloads enable

dcc downloads are enabled

monitor flash probe 0

flash 'at91sam7' found at 0x00100000

monitor flash erase_sector 0 0 15

erased sectors 0 through 15 on flash bank 0 in 0.250853s

monitor flash write_bank 0 main.bin 0

wrote 3472 bytes from file main.bin to flash bank 0 at offset 0x00000000 in 4.099915s (0.827 kb/s)

monitor reset run

JTAG tap: at91sam7x256.cpu tap/device found: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)

target state: halted

target halted in ARM state due to debug-request, current mode: Supervisor

cpsr: 0x200000d3 pc: 0x000020e0

monitor soft_reset_halt

requesting target halt and executing a soft reset

target state: halted

target halted in ARM state due to debug-request, current mode: Supervisor

cpsr: 0x200000d3 pc: 0x00000000

monitor arm7_9 force_hw_bkpts enable

arm7_9 force_hw_bkpts enable: command requires more arguments

in procedure 'arm7_9' called at file "command.c", line 650

called at file "command.c", line 361

thbreak main

Hardware assisted breakpoint 1 at 0x16c: file main.c, line 60.

continue

Temporary breakpoint 1, main () at main.c:60

60 int w = 1; // initialized variable

Unable to set 32 bit software breakpoint at address 00000270 - check that memory is read/writable